Content addressable memory with selectable mask write mode
AssigneeNetLogic Microsystems, Inc.
InventorsBindiganavale S. Nataraj, Nilesh A. Gharia, Rupesh R. Roy, Jose P. Pereira, Varadarajan Srinivasan, Sandeep Khanna, Hok F. Wong
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Abstract
A content addressable memory (CAM) that includes a CAM array and a write circuit. The write circuit is coupled the CAM array and has a coding circuit to convert a first value into a second value, and a select circuit to select either the first value or the second value to be stored in the CAM array.
Claims65
A content addressable memory (CAM) device comprising:
- a CAM array;
- and
- a write circuit coupled the CAM array and having a coding circuit to convert a first value into a second value, and a select circuit to select either the first value or the second value to be stored in the CAM array.
A content addressable memory (CAM) device comprising:
- a CAM array;
- a priority index table coupled to the CAM array;
- and
- a write circuit coupled the priority index table and having a coding circuit to convert a first value into a second value, and a select circuit to select either the first value or the second value to be stored in the priority index table.
A method of operation within a content addressable memory (CAM) device, the method comprising:
- receiving a first data value;
- generating a second data value from the first data value;
- and
- storing, according to a mode signal, either the first data value or the second data value in a CAM array within the CAM device.
A method of operation within a content addressable memory (CAM) device, the method comprising:
- receiving a first data value;
- generating a second data value from the first data value;
- and
- storing, according to a mode signal, either the first data value or the second data value in a priority index table within the CAM device.
A content addressable memory (CAM) device comprising:
- a first storage array;
- means for receiving a first data value;
- means for generating a second data value from the first data value;
- and
- means for storing, according to a mode signal, either the first data value or the second data value in a first storage array within the CAM device.
A system comprising:
- a signal path;
- a processor to coupled to the signal path to output instructions thereon, at least one of the instructions including mode select information;
- and
- a CAM device coupled to the signal path to receive the instructions from the processor, the CAM device including a CAM array and a write circuit coupled the CAM array, the write circuit including a coding circuit and a select circuit, the coding circuit being adapted to convert a first value into a second value, and the select circuit being adapted to select, according to the mode select information output by the processor, either the first value or the second value to be stored in the CAM array.
A method of controlling a content addressable memory (CAM) device, the method comprising:
- outputting mode select information to the CAM device;
- outputting a priority number to the CAM device, the CAM device being responsive to the mode select information to decode the priority number to generate a mask word, the mask word being indicative of at least one bit of a data word to be masked during a compare operation within the CAM device.
A method of controlling a content addressable memory (CAM) device, the method comprising:
- outputting mode select information to the CAM device;
- outputting a mask word to the CAM device, the CAM device being responsive to the mode select information to decode the mask value to generate a priority number.
Dependencies are inferred from the claim text.