Circuit and method for DC offset calibration and signal processing apparatus using the same
AssigneeIntegrant Technologies Inc.
InventorsJunghwan Lee, Bo-Eun Kim, Jinkyu Lim, Minsu Jeong, Bonkee Kim
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntegrant Technologies Inc.
InventorsJunghwan Lee, Bo-Eun Kim, Jinkyu Lim, Minsu Jeong, Bonkee Kim
Estimating the term…
A signal processing apparatus for correcting DC offset in a communication system is provided. The signal processing apparatus comprises: a low noise amplifier (LNA) 301; a mixer 303 for mixing the output from said LNA 301 with local oscillation signal LO; a first offset correction amplifier 305 for amplifying output signal from said mixer 303 and for eliminating DC offset in the output signal in accordance with first control signal Vc31; a second offset correction amplifier 309 for amplifying output signal from said first offset correction amplifier 305 and for eliminating DC offset in the output signal in accordance with second control signal Vc32; a variable gain amplifier 311 for amplifying output from said second offset correction amplifier 309 wherein gain is controlled such that power level of output be maintained to a desired value; offset calibration mean 313 for calibrating DC offset in output from said variable gain amplifier 311; and offset correction mean 315 for outputting the first and second control signals Vc31 and Vc32 in accordance with the output from said offset calibration mean 313, to eliminate DC offset in the output from said variable gain amplifier 311.
Signal processing apparatus comprising:
Signal processing apparatus comprising:
Signal processing apparatus comprising:
Method for correcting DC offset in a signal processing apparatus comprising steps of:
Method for correcting DC offset in a signal processing apparatus comprising steps of:
Dependencies are inferred from the claim text.