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US 6,747,323 B2Granted
Static semiconductor memory device
AssigneeRenesas Technology Corp.
InventorShigeki Komori
Life of this patent
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Abstract
A static semiconductor memory device capable of preventing soft errors is provided. The static semiconductor memory device includes: a silicon substrate having a p-type well region; a storage node; an n-type-low-concentration impurity region and a high-concentration impurity region formed in the surface of p-type well region and connected to storage node; and a p-type impurity region formed to have contact with high-concentration impurity region.
Claims2
A static semiconductor memory device, comprising:
- a semiconductor substrate;
- a semiconductor region of a first conductivity type formed in said semiconductor substrate;
- a semiconductor region of a second conductivity type formed in said semiconductor substrate to have contact with said semiconductor region of the first conductivity type;
- and
- a field effect transistor having a channel region of the first conductivity type formed in said semiconductor region of the first conductivity type, said semiconductor region of the second conductivity type being in contact with said semiconductor region of the first conductivity type and including a first extension region extending toward said channel region;
- wherein a bottom of said first extension region and a bottom of said semiconductor region of the first conductivity type are substantially coplanar;
- and
- wherein a potential different from that of said semiconductor region of the first conductivity type is applied to said semiconductor region of said second conductivity type to attract carriers of the second conductivity type.
5 more elements
Dependencies are inferred from the claim text.