Charge detector semiconductor component, system comprising a charge detector semiconductor component and a reference semiconductor component, wafer, use of a wafer, and method for the qualitative and quantitative measurement of charging of a wafer

A system comprising a charge detector semiconductor component and a reference semiconductor component in the form of a structure provided on a semiconductor material, wherein the charge detector semiconductor component comprises a non-volatile detector storage cell in the form of

• a first MOS field effect transistor with a detector transistor gate, and
• a first MOS capacitor with a detector capacitor gate, and comprises an antenna which is connected to the detector capacitor gate via a first operational connection, and wherein
• the detector capacitor gate is connected to the detector transistor gate via a further first operational connection, and wherein
• the reference semiconductor component comprises a non-volatile reference storage cell in the form of
• a second MOS field effect transistor with a reference transistor gate, and
• a second MOS capacitor with a reference capacitor gate, and comprises a ground conductor which is connected to the reference capacitor gate via a second operational connection, while the reference capacitor gate is connected to the reference transistor gate via a further second operational connection, and wherein the structure is arranged in compatibility with the CMOS technology.

A method for the qualitative and quantitative measurement of a charging of a wafer during processing of the wafer, wherein

• the wafer is manufactured with the use of a CMOS-type technology,
• the wafer is provided with a system comprising a charge detector semiconductor component and a reference semiconductor component during its manufacture,
• which charge detector semiconductor component comprises a non-volatile detector storage cell in the form of
• a first MOS field effect transistor with a detector transistor gate, and
• a first MOS capacitor with a detector capacitor gate, and comprises an antenna
• which is connected to the detector capacitor gate by means of a first operational connection, wherein
• the detector capacitor gate is connected to the detector transistor gate by means of a further first operational connection, and wherein
• the reference semiconductor component comprises a non-volatile reference storage cell in the form of
• a second MOS field effect transistor with a reference transistor gate, and
• a second MOS capacitor with a reference capacitor gate, and
• a ground conductor
• which is connected to the reference capacitor gate by means of a second operational connection, while the reference capacitor gate is connected to the reference transistor gate by means of a further second operational connection, and the structure is arranged in accordance with a CMOS technology such that
• during processing the detector capacitor gate is charged via the antenna, and the reference capacitor gate is possibly charged, and the reference capacitor gate is discharged via the ground conductor, and
• the charging of the detector capacitor gate is compared with the charging of the reference capacitor gate by means of a measurement.