Over voltage protection test multiplexer and methods of operating the same

A method of operating a test multiplexer for over voltage protection, said test multiplexer comprising a plurality of MOSFET devices and over voltage protection circuitry, said method comprising the steps of:

• using said plurality of MOSFET devices, when said test multiplexer is enabled, to cooperatively pass an input signal sampled from an input signal line of said test multiplexer to an output signal line of said test multiplexer;
• and
• biasing said over voltage protection circuitry, when said test multiplexer is disabled, so that a difference between an input signal voltage and a bias voltage does not exceed breakdown.

For use in integrated circuitry, a test multiplexer having over voltage protection circuitry capable of sampling a first input signal on a first input signal line, said test multiplexer comprising:

• at least one p-type MOSFET device and at least one n-type MOSFET device that cooperate to pass said first input signal to an output signal line of said test multiplexer;
• and
• a bias circuit that operates to generate a reference voltage that is not more than a breakdown threshold voltage, Vt, below a maximum signal level on said first signal line, wherein said reference voltage is applied to at least one of a gate, a drain, a source and a bulk connection of said at least one p-type MOSFET device such that none of a first voltage difference between said gate and said drain, a second voltage difference between said gate and said source, and a third voltage difference between said gate and said bulk connection is greater than said breakdown threshold voltage, Vt.