Error amplifier circuit

An error amplifier circuit comprising:

• a differential amplifier receiving a first input signal and a second input signal, said differential amplifier generating an output signal on an output terminal indicative of the difference between said first input signal and said second input signal;
• a cascode gain stage coupled to receive said output signal of said differential amplifier and generating a second output signal, said cascode gain stage being biased by a bias current generated by a current mirror;
• and
• an amplifier receiving said second output signal from said cascode gain stage and generating a third output signal;
• wherein said cascode gain stage is biased by a control signal for causing said current mirror to generate said bias current having substantially constant magnitude over variations in voltage differences of said first input signal and said second input signal;
• and
• wherein said amplifier comprises:
• a first transistor having a control terminal receiving said second output signal from said cascode gain stage, a first current handling terminal coupled to a first supply voltage and a second current handling terminal coupled to a bias current source and providing said output signal;
• and
• a resistor and a capacitor connected in series between said control terminal and said second current handling terminal of said first transistor.

An error amplifier circuit comprising:

• a differential amplifier receiving a first input signal and a second input signal, said differential amplifier generate an output signal across a first output terminal and a second output terminal indicative of the difference between said first input signal and said second input signal;
• a cascode gain stage coupled to receive said output signal of said differential amplifier and generating a second output signal, said cascode gain stage including a first transistor receiving a first bias current and a second transistor receiving a second bias current, the first and second bias currents generated by a current mirror;
• and
• an amplifier receiving said second output signal from said cascode gain stage and generating a third output signal;
• wherein said cascode gain stage is biased by a control signal for causing said current mirror to generate said first bias current having substantially constant magnitude over variations in voltage differences of said first input signal and said second input signal.