Voltage boost circuit and low supply voltage sampling switch circuit using same

A low supply voltage sampling switch circuit with a voltage boost circuit comprising:

• a boost capacitor;
• a charging circuit for charging in the charging mode said boost capacitor to a supply voltage, said charging circuit including a charging MOS switch interconnected between the supply voltage and one terminal of said boost capacitor and a back gate isolation circuit connected to the back gate of said charging MOS switch and including a first switch for connecting said back gate to said supply voltage for reverse biasing said back gate in the charging mode and a second switch for connecting said back gate to said one terminal of said boost capacitor for reverse biasing the back gate in the boost mode to prevent charge loss from the boost capacitor;
• a boost bias voltage and a boost switch for connecting the second terminal of said boost capacitor to said boost bias voltage in the boost mode;
• an MOS sampling switch;
• a boost switch for interconnecting in said boost mode said one terminal of said boost capacitor with the gate of said sampling switch for maintaining said sampling switch in the conducting state;
• and
• a driving circuit having at least one stage with its supply connected to one terminal of the boost capacitor for providing driving levels of the correct voltage to the charging MOS switch in both the charging mode and the boost mode.

A voltage boost circuit comprising:

• a boost capacitor;
• a charging circuit for charging in the charging mode said boost capacitor to a supply voltage;
• said charging circuit including a charging MOS switch interconnected between the supply voltage and one terminal of said boost capacitor and a back gate isolation circuit connected to the back gate of said charging MOS switch and including a first switch for connecting said back gate to said supply voltage for reverse biasing said back gate in the charging mode and a second switch for connecting said back gate to said one terminal of said boost capacitor for reverse biasing the back gate in the boost mode to prevent charge loss from the boost capacitor;
• and
• a boost bias voltage and a boost switch for connecting the second terminal of said boost capacitor to said boost bias voltage in the boost mode, wherein said boost bias voltage is an independent reference voltage.

A low supply voltage sampling switch circuit with a voltage boost circuit comprising:

• a boost capacitor;
• a charging circuit for charging in the charging mode said boost capacitor to a supply voltage, said charging circuit including a charging MOS switch interconnected between the supply voltage and one terminal of said boost capacitor and a back gate isolation circuit connected to the back gate of said charging MOS switch and including a first switch for connecting said back gate to said supply voltage for reverse biasing said back gate in the charging mode and a second switch for connecting said back gate to said one terminal of said boost capacitor for reverse biasing the back gate in the boost mode to prevent charge loss from the boost capacitor;
• a boost bias voltage and a boost switch for connecting the second terminal of said boost capacitor to said boost bias voltage in the boost mode, wherein said boost bias voltage is an independent reference voltage;
• an MOS sampling switch;
• and
• a boost switch for interconnecting in said boost mode said one terminal of said boost capacitor with the gate of said sampling switch for maintaining said sampling switch in the conducting state.