Semiconductor integrated circuit
AssigneeKabushiki Kaisha Toshiba
InventorOsamu Hirabayashi
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AssigneeKabushiki Kaisha Toshiba
InventorOsamu Hirabayashi
Estimating the term…
A semiconductor integrated circuit comprising a voltage controlled delay cell including a first voltage controlled resistor and a current source transistor of a MOS type differential amplifier circuit, the first voltage controlled resistor functioning as a load resistor, wherein a resistance value of the first voltage controlled resistor is controlled according to a first bias voltage, and a current of the current source transistor is controlled according to a second bias voltage, and a bias circuit including a first replica circuit and a second replica circuit, the first replica circuit having a structure equivalent to that of the voltage controlled delay cell, the second replica circuit having a structure equivalent to a structure in which the first voltage controlled resistor is replaced by a constant resistor, the bias circuit configured to generate and supply the first bias voltage and the second bias voltage to the voltage controlled delay cell.
A semiconductor integrated circuit comprising:
Dependencies are inferred from the claim text.