Methods and systems for reducing heat flux in memory systems
AssigneeRambus Inc.
InventorsSteven C. Woo, Craig E. Hampel
Life of this patent
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Abstract
Systems and methods for reducing heat flux in memory systems are described. In various embodiments, heat flux reductions are achieved by manipulating the device IDs of individual memory devices that comprise a memory module. Through the various described techniques, the per-face heat flux can be desirably reduced. Further, in some embodiments, reductions in heat flux are achieved by providing control lines that operably connect memory devices on different faces of a memory module.
Claims55
A memory module comprising:
- one or more faces;
- multiple channels on one or more of the faces;
- multiple memory devices on each channel, the memory devices being configured for operation in lock-step;
- and
- device IDs for each device, the device IDs being arranged in a manner to reduce heat flux associated with the memory module.
A memory system comprising:
- one or more memory modules, each of which comprising:
- one or more faces;
- multiple channels on one or more of the faces;
- and
- multiple memory devices on each channel, the memory devices being configured for operation in lock-step;
- and
- a memory controller operably connected with the one or more memory modules, the memory controller being configured to assign device IDs for each device, the device IDs being arranged in a manner to reduce heat flux associated with the one or more memory modules.
A memory module comprising:
- one or more faces;
- multiple channels on one or more of the faces;
- multiple DRAM devices on each channel, the DRAM devices being configured for operation in lock-step;
- and
- device IDs for each DRAM device, corresponding DRAM devices on different channels having the same device ID, the device IDs being arranged in a manner to reduce heat flux associated with the memory module.
A memory system comprising:
- one or more memory modules, each of which comprising:
- one or more faces;
- multiple channels on one or more of the faces;
- and
- multiple DRAM devices on each channel, the DRAM devices being configured for operation in lock-step;
- and
- a memory controller operably connected with the one or more memory modules, the memory controller being configured to assign device IDs for each DRAM device, corresponding DRAM devices on different channels having the same device ID, the device IDs being arranged in a manner to reduce heat flux associated with the one or more memory module.
A method comprising:
- providing one or more memory modules each comprising one or more faces, multiple channels on one or more of the faces, multiple memory devices on each channel, the memory devices being configured for operation in lock-step;
- and
- assigning device IDs for each device, the device IDs being arranged in a manner to reduce heat flux associated with the one or more memory modules.
A method comprising:
- providing one or more memory modules each comprising one or more faces, multiple channels on one or more of the faces, multiple DRAM devices on each channel, the DRAM devices being configured for operation in lock-step;
- and
- assigning device IDs for each DRAM device, corresponding DRAM devices on different channels having the same device ID, the device IDs being arranged in a manner to reduce heat flux associated with the one or more memory modules.
A memory module comprising:
- front and back faces;
- one or more device on each face;
- a control line connecting devices on each of the faces in a manner to reduce heat flux associated with the memory module.
A method comprising:
- providing a memory module comprising front and back faces, and multiple devices on each face;
- and
- connecting devices on each of the faces by routing a control line through the memory module in a manner to reduce heat flux associated with the memory module.
Dependencies are inferred from the claim text.