Bit line control and sense amplification for TCCT-based memory cells
AssigneeT-Ram, Inc.
InventorsSei-Seung Yoon, Seong-Ook Jung
Life of this patent
Estimating the term…
Abstract
A circuit and a method are provided for facilitating control of bit lines in preparation for, or during, sense amplification of data signals from thinly capacitively-coupled thyristor (“TCCT”)-based memory cells. In accordance with a specific embodiment, a circuit and method are designed, among other things, to effectively minimize power consumption by memory cells and to increase speed and reliability of sense amplification. In another specific embodiment, the circuit and method are directed to TCCT-based memory cells.
Claims53
A sensing circuit including a sense amplifier to resolve a data signal generated by a TCCT-based memory cell, the sensing circuit comprising:
- a bit line coupled to the TCCT-based memory cell to receive the data signal;
- a first pre-charge device coupled to the bit line and configured to pre-charge the bit line;
- a reference bit line configured to receive a reference signal from a reference memory cell;
- and
- a second pre-charge device coupled to the reference bit line and configured to pre-charge the reference bit line.
A sensing circuit including a sense amplifier to resolve a data signal generated by a memory cell, the sensing circuit comprising:
- a bit line coupled to the memory cell to receive the data signal;
- a first node connected to a first input of the sense amplifier, the first node configured to couple with the bit line;
- a first pre-charge device coupled to the bit line to pre-charge the bit line to a first pre-determined level;
- and
- a second pre-charge device coupled to the first node to pre-charge the bit line to a second pre-determined level.
A method of controlling a sensing circuit, the method comprising:
- coupling a bit line to a first node, the first node associated with a first sense amplifier input;
- pre-charging the bit line to a first pre-determined level;
- pre-charging the first node to the first pre-determined level;
- floating the bit line;
- floating the first node;
- and
- transferring a data signal from a TCCT-based memory cell onto the bit line.
A method of controlling a sensing circuit, the method comprising:
- floating a bit line;
- pre-charging a first node to a first pre-determined level;
- pre-charging the bit line to a second pre-determined level;
- coupling the bit line to the first node, the first node associated with a first sense amplifier input;
- and
- floating the first node.
A method of controlling a sensing circuit, the method comprising:
- floating a bit line;
- pre-charging a first node to a first pre-determined level;
- pre-charging the bit line to a second pre-determined level;
- coupling the bit line to the first node, the first node associated with a first sense amplifier input;
- and
- transferring a data signal from a thinly capacitively-coupled thyristor based memory cell onto the bit line.
A method of controlling a sensing circuit, the method comprising:
- floating a bit line;
- pre-charging a first node to a first pre-determined level;
- pre-charging the bit line to a second pre-determined level;
- and
- coupling the bit line to the first node, the first node associated with a first sense amplifier input;
- wherein the coupling of the bit line to the first node is approximately near or prior in time to the application of the data signal from the bit line to the first node.
A method of controlling a sensing circuit, the method comprising:
- floating a bit line;
- pre-charging a first node to a first pre-determined level;
- pre-charging the bit line to a second pre-determined level;
- coupling the bit line to the first node, the first node associated with a first sense amplifier input;
- floating a reference bit line;
- pre-charging a second node to a third pre-determined level;
- pre-charging the bit line to a fourth pre-determined level;
- and
- coupling the reference bit line to the second node, the second node associated with a second sense amplifier input.
Dependencies are inferred from the claim text.