Back to results
US 6,720,629 B2Granted
Structure of a memory device with buried bit line
AssigneeMacronix International Co., Ltd.
InventorsJiun-Ren Lai, Chun-Yi Yang, Shi-Xian Chen, Gwen Chang
Life of this patent
Estimating the term…
Abstract
A buried bit line and a fabrication method thereof, wherein the device includes a substrate, a shallow doped region disposed in the substrate, a deep doped region disposed in the substrate below a part of the shallow doped region, wherein the shallow doped region and the deep dope region together form a bit line of the memory device.
Claims15
A buried bit line formed in a substrate of a semiconductor device, comprising
- a shallow doped region, disposed in the substrate;
- and
- a deep doped region, disposed in the substrate under a part of the shallow doped region, a deep doped region, disposed in the substrate under a part of the shallow doped region, wherein dopant concentrations in the deep doped region and the shallow doped region are about the same, and the shallow doped region and the deep doped region together serve as a buried bit line of the memory device.
A memory device, comprising:
- a substrate;
- a gate, disposed on a part of the substrate;
- a gate oxide layer, disposed between the substrate and the gate;
- a shallow doped region, disposed in the substrate beside both sides of the gate;
- and
- a deep doped region, disposed in the substrate under a part of the shallow doped region, wherein dopant concentrations in the deep doped region and the shallow doped region are about the same, and the shallow doped region and the deep doped region together serve as a buried bit line of the memory device.
3 more elements
Dependencies are inferred from the claim text.