Method for adding redundant vias on VLSI chips
AssigneeInternational Business Machines Corporation
InventorThomas Charles Brennan
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Abstract
A method is shown which replaces single vias with redundant vias on candidate signals on a semiconductor integrated circuit chip. Where limited space prevents such replacement on more than one signal wire, the method assigns priority to the via through which more current must flow to charge or discharge capacitance. This prioritization reduces the magnitude of delay anomalies arising from vias containing process related resistance defects.
Claims6
A signal bearing medium containing a program which, when executed by a processor, performs a method for replacement of single vias by redundant vias on a semiconductor chip, comprising the steps of:
- determining a value for each single via on said chip indicative of a magnitude of a delay anomaly resultant from a resistive defect in said single via;
- replacing each single via with a redundant via if wiring area is available and no other single via contends for said area;
- comparing said value for each contending single via in a plurality of contending single vias in an area of contention where no more than one redundant via can be created;
- and
- replacing with a redundant via the contending single via in the plurality of contending single vias in the area of contention for which said value indicates the largest said delay anomaly would be caused by a resistive defect in said single via.
Dependencies are inferred from the claim text.