Semiconductor device for wafer examination

A semiconductor device, comprising:

• a semiconductor wafer including a plurality of chip regions in which a specified circuit is formed, and a scribe region to divide the plurality of chip regions;
• a test circuit for wafer examination formed in the scribe region and formed of a plurality of transistors:
• an output pad formed in the scribe region and connected to the test circuit;
• and
• an input pad formed in the scribe reagon and connected to the test circuit,
• the test circuit including a selector circuit that supplies a signal supplied from the input pad to at least one of a first output and a second output according to a control signal, a plurality of inverter circuits serially connected to a first output of the selector circuit, and an output circuit that supplies to the output pad one of an output signal of the last stage of the plurality of inverter circuits and a second output signal of the selector circuit, and
• the semiconductor device further including a control pad formed in the scribe region to input a control signal to the selector circuit.

A semiconductor device, comprising:

• a semiconductor wafer including a plurality of chip regions in which a specified circuit is formed, and a scribe region to divide the plurality of chip regions:
• a test circuit for wafer examination formed in the scribe region and formed of a plurality of transistors;
• an output pad formed in the scribe region and connected to the test circuit;
• and
• an input pad formed in the scribe region and connected to the test circuit, the test circuit including a plurality of inverter circuits serially connected to the input pad, and an output circuit that produces an exclusive OR of an output signal of the last stage of the plurality of inverter circuits and an input signal supplied to the input pad and supplies one of the output signal and the input signal to the output pad.