Semiconductor device
AssigneeSeiko Epson Corporation
InventorsTakashi Kumagai, Masahiro Takeuchi, Satoru Kodaira, Takafumi Noda
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Abstract
A semiconductor device includes an SRAM section and a logic circuit section formed on a single semiconductor substrate. First and second gate electrode layers located in a first conductive layer, first and second drain-drain contact layers located in a second conductive layer, first and second drain-gate contact layers located in a third conductive layer become conductive layers for forming a flip-flop of the SRAM section. The logic circuit section has no wiring layer at the same level as the first and second drain-drain contact layers.
Claims9
A semiconductor device comprising a memory cell area and a semiconductor circuit section other than the memory cell section that are formed on the same semiconductor substrate, the memory cell section having a plurality of memory cells each of which includes a first driver transistor, a second driver transistor, a first load transistor, a second load transistor, a first transfer transistor, and a second transfer transistor, wherein:
- each of the memory cells comprises a first gate electrode layer, a second gate electrode layer, a first drain-drain contact layer, a second drain-drain contact layer, a first drain-gate contact layer, and a second drain-gate contact layer;
- the first gate electrode layer comprises a gate electrode of the first driver transistor and a gate electrode of the first load transistor;
- the second gate electrode layer comprises a gate electrode of the second driver transistor and a gate electrode of the second load transistor;
- the first drain-drain contact layer and the second drain-drain contact layer are located above the first gate electrode layer and the second gate electrode layer;
- the first drain-drain contact layer is used to connect a drain region of the first driver transistor to a drain region of the first load transistor;
- the second drain-drain contact layer is used to connect a drain region of the second driver transistor to a drain region of the second load transistor;
- the first drain-gate contact layer is located above the first drain-drain contact layer and the second drain-drain contact layer;
- the first drain-gate contact layer is used to connect the first drain-drain contact layer to the second gate electrode layer;
- the second drain-gate contact layer is used to connect the second drain-drain contact layer to the first gate electrode layer;
- and
- the semiconductor circuit section has no wiring layer at the same level as the first drain-drain contact layer and the second drain-drain contact layer.
Dependencies are inferred from the claim text.