DMOS transistor structure with gate electrode trench for high density integration and method of fabricating the structure

A double diffused MOS (DMOS) transistor structure comprising:

• an epitaxial silicon layer having a first conductivity type formed on a silicon substrate;
• a well region having a second conductivity type that is opposite the first conductivity type formed in the epitaxial silicon layer;
• a dielectric isolation region formed in the epitaxial silicon layer at the periphery of the well region;
• a trench trough formed in the epitaxial silicon layer such that one of the walls of the trench trough comprises exposed epitaxial silicon and remaining walls of the trench trough comprise dielectric isolation material;
• a connection region having the second conductivity type formed in the epitaxial silicon layer under the trench trough, and extending into contact with the well region, and comprising dopant of the second conductivity type introduced into the epitaxial silicon sidewall of the trench trough;
• a conductive gate electrode formed to extend into the trench trough but to be separated from sidewalls of the trench trough by intervening gate dielectric material;
• and
• a body implant region having the first conductivity type formed in the epitaxial silicon layer on one side of the conductive gate electrode.