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US 6,713,385 B1Granted
Implanting ions in shallow trench isolation structures
AssigneeIntel Corporation
InventorsLeonard C. Pipes, Rita Slilaty
Life of this patent
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Abstract
Ions are implanted into the dielectric layer and/or barrier layer over a semiconductor substrate to change the polish rates of either or both layers during formation of a shallow trench isolation (STI) structure. The ion implantation can change or affect the polish rates of the material and the polish selectivity, and reduce or minimize unwanted topography resulting from chemical mechanical polishing (CMP). After CMP, the resulting STI structure has a more uniform and smooth topography.
Claims14
A method, comprising:
- forming a trench in a semiconductor substrate surface;
- depositing a dielectric material onto the semiconductor substrate surface and into the trench;
- implanting ions into at least some of the dielectric material to form an implanted dielectric region;
- and
- polishing the semiconductor substrate surface to remove at least some of the implanted dielectric region.
2 more elements
A method, comprising:
- forming a nitride layer on a silicon wafer surface, the nitride layer having a first polish rate;
- etching a plurality of recesses in the silicon wafer surface;
- forming an oxide layer on the silicon wafer surface and in the plurality of recesses, the oxide layer having a second polish rate;
- implanting ions into at least one of the nitride layer and the oxide layer to form an implanted region having a third polish rate different from the first and second polish rates;
- and
- polishing the silicon wafer surface to remove at least some of the oxide layer and at least some of the implanted region therefrom.
3 more elements
Dependencies are inferred from the claim text.