Non-volatile memory device with enlarged trapping layer
AssigneeMacronix International Co., Ltd.
InventorChia-Chi Chung
Life of this patent
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Abstract
Methods for making a nonvolatile memory device, such as an NROM device that has an oxide-nitride-oxide layer beneath at least one word line structure, are disclosed. The oxide-nitride-oxide layer is in the form of a plurality of oxide-nitride block structures disposed over an oxide layer, with each of the oxide-nitride block structures overlapping two adjoining bit lines. A dielectric resolution enhancement coating technique is performed to precisely control the oxide-nitride block structure dimensions.
Claims21
A method for forming at least one nonvolatile memory device, comprising the following steps:
- (a) forming a trapping layer on a prepared substrate;
- (b) forming a patterned photoresist layer on the trapping layer;
- (c) using the patterned photoresist layer as an implanting mask to perform an implantation to form at least one bit line;
- (d) forming a first material layer on surfaces of the photoresist layer;
- (e) using the first material layer as an etching mask to pattern the trapping layer into at least one trapping layer strip;
- (f) removing the first material and the patterned photoresist layer;
- (g) forming an oxide beside the at least one trapping layer strip and above the at least one bit line;
- (h) forming at least one word line on the at least one trapping layer strip;
- (i) forming a second material layer on surfaces of the at least one word line;
- (j) using the second material layer as an etching mask to pattern the at least one trapping layer strip into a plurality of trapping layer block structures;
- and
- (k) removing the second material layer.
A method for forming a nonvolatile memory on a semiconductor substrate, the method comprising the steps of:
- (a) providing a prepared semiconductor substrate;
- (b) forming a trapping layer on the semiconductor substrate;
- (c) applying and patterning a photoresist over the trapping layer to form a plurality of photoresist strips;
- (d) selectively implanting the semiconductor substrate to form a plurality of bit lines;
- (e) forming a first material layer on surfaces of the patterned photoresist;
- (f) etching back portions of the trapping layer to form a plurality of trapping layer strips;
- (g) removing the first material layer and the patterned photoresist;
- (h) forming an oxide over the plurality of bit lines;
- (i) forming a plurality of word lines;
- (j) forming a second material layer on surfaces of the word lines;
- (k) etching portions of the plurality of trapping layer strips to form a plurality of trapping layer block structures;
- and
- (l) removing the second material layer.
Dependencies are inferred from the claim text.