Digital pixel sensor with a dynamic comparator having reduced threshold voltage sensitivity
AssigneeMicron Technology, Inc.
InventorNikolai E. Bock
Life of this patent
Estimating the term…
Abstract
A digital pixel sensor architecture has a comparator located within the pixel and a frame memory located outside the pixel. The comparator is used with additional circuitry to perform analog-to-digital conversion. Replacing the analog-to-digital converter and memory of a conventional digital pixel sensor minimizes many issues associated with conventional digital pixel sensors while preserving the architecture's resistance to noise and speed.
Claims36
A method for comparing a first signal and a second signal, comprising:
- precharging a source of a first input transistor to a first voltage, said first voltage being at a fixed offset less than a threshold voltage of said first input transistor;
- precharging a source of a second input transistor to a second voltage, said second voltage being at the fixed offset less than a threshold voltage of said second input transistor;
- coupling said first signal to a gate of said first input transistor;
- coupling said second signal to a gate of said second input transistor;
- sinking a first current through said first input transistor at a first rate related to a difference between a voltage of said first signal and said first voltage;
- sinking a second current through said second input transistor at a second rate related to a difference between a voltage of said second signal and said second voltage;
- if said first input transistor sinks a predetermined amount of current before said second input transistor, latching a first output node to a first predetermined voltage and latching a second output node to a second predetermined voltage;
- and
- if said second input transistor sinks a predetermined amount of current before said first input transistor, latching the second output node to the first predetermined voltage and latching the first output node to the second predetermined voltage;
- wherein said step of precharging a source of a first input transistor comprises,
- coupling a capacitor to said source of said first input transistor;
- discharging said capacitor by coupling both plates of said capacitor to ground;
- coupling a power supply voltage to a drain of said first input transistor;
- and
- coupling a bias voltage to a gate of said first input transistor, wherein said first input transistor conducts between the source and the drain until a voltage at the source is equal to the power supply voltage minus the threshold voltage of said first transistor.
A method for comparing a first signal and a second signal, comprising:
- precharging a source of a first input transistor to a first voltage, said first voltage being at a fixed offset less than a threshold voltage of said first input transistor;
- precharging a source of a second input transistor to a second voltage, said second voltage being at the fixed offset less than a threshold voltage of said second input transistor;
- coupling said first signal to a gate of said first input transistor;
- coupling said second signal to a gate of said second input transistor;
- sinking a first current through said first input transistor at a first rate related to a difference between a voltage of said first signal and said first voltage;
- sinking a second current through said second input transistor at a second rate related to a difference between a voltage of said second signal and said second voltage;
- if said first input transistor sinks a predetermined amount of current before said second input transistor, latching a first output node to a first predetermined voltage and latching a second output node to a second predetermined voltage;
- and
- if said second input transistor sinks a predetermined amount of current before said first input transistor, latching the second output node to the first predetermined voltage and latching the first output node to the second predetermined voltage;
- wherein said step of precharging a source of a second input transistor comprises,
- coupling a capacitor to said source of said second input transistor;
- coupling a power supply voltage to a drain of said second input transistor;
- coupling a bias voltage to a gate of said second input transistor, wherein said second input transistor conducts between the source and the drain until a voltage at the source is equal to the power supply voltage minus the threshold voltage of said second transistor.
A dynamic comparator, comprising:
- a first PMOS transistor having a first source/drain terminal coupled to a power supply voltage and a second source/drain terminal coupled to a first output node and a gate coupled to a second output node;
- a second PMOS transistor having a third source/drain terminal coupled to the power supply voltage and a fourth source/drain terminal coupled to said second output node and a gate coupled to said first output node;
- a first input transistor having a drain coupled to said first output node, a source coupled to a first capacitor, and a gate coupled to a first input node;
- and
- a second input transistor having a drain coupled to said second output node, a source coupled to a second capacitor, and a gate coupled to a second input node.
A method for operating a pixel, comprising:
- resetting a potential at a photodiode to a first predetermined state;
- accumulating charge at said photodiode;
- transferring accumulated charge to a capacitor to cause a transfer node to take a transferred potential related to said accumulated charge;
- comparing said transferred potential with a reference signal;
- and
- outputting a first result of said comparison to digitize said transferred potential;
- resetting a potential at said transfer node to a second predetermined state;
- comparing said second predetermined state with a second reference signal to digitize said second predetermined state;
- outputting a second result of said comparison to digitize said transferred potential;
- wherein said reference signal and said second reference signal are generated outside said pixel.
A method for operating a pixel, comprising:
- resetting a potential at a photodiode to a first predetermined state;
- accumulating charge at said photodiode;
- transferring accumulated charge to a capacitor to cause a transfer node to take a transferred potential related to said accumulated charge;
- comparing said transferred potential with a reference signal;
- and
- outputting a first result of said comparison to digitize said transferred potential;
- wherein said reference signal is generated outside the pixel
- wherein said reference signal is a ramp signal generated outside the pixel.
A method for operating a pixel, comprising:
- resetting a potential at a photodiode to a first predetermined state;
- accumulating charge at said photodiode;
- transferring accumulated charge to a capacitor to cause a transfer node to take a transferred potential related to said accumulated charge;
- comparing said transferred potential with a reference signal;
- and
- outputting a first result of said comparison to digitize said transferred potential;
- wherein said reference signal generated outside the pixel and is a successive approximation based upon a lower threshold and a higher threshold, said lower and higher threshold being derived from upon previous comparisons.
A method for operating a pixel, comprising:
- resetting a potential at a photodiode to a first predetermined state;
- accumulating charge at said photodiode;
- transferring accumulated charge to a capacitor to cause a transfer node to take a transferred potential related to said accumulated charge;
- comparing said transferred potential with a reference signal;
- and
- outputting a first result of said comparison to digitize said transferred potential;
- wherein
- said reference signal is generated outside the pixel;
- and
- said first result is transferred to a processor.
A method for operating a pixel, comprising:
- resetting a potential at a photodiode to a first predetermined state;
- accumulating charge at said photodiode;
- transferring accumulated charge to a capacitor to cause a transfer node to take a transferred potential related to said accumulated charge;
- comparing said transferred potential with a reference signal;
- and
- outputting a first result of said comparison to digitize said transferred potential;
- wherein
- said reference signal is generated outside the pixel;
- and
- an offset value is added to said first result.
A pixel, comprising:
- a photodiode;
- a capacitor;
- a transfer transistor, said transfer transistor having one source/drain coupled to the photodiode and another source/drain coupled to the capacitor;
- a reset transistor for controllably coupling a reset voltage to said photodiode;
- a memory reset transistor for controllably coupling the reset voltage to said capacitor;
- and
- a comparator, said comparator having a first signal terminal coupled to said capacitor, a second signal terminal coupled to a reference signal source and an output terminal.
An imaging system, comprising:
- a pixel array, said pixel array comprising a plurality of pixels, each of said pixels further comprising,
- a photodiode;
- a capacitor;
- a transfer transistor, said transfer transistor having one source/drain coupled to the photodiode and another source/drain coupled to the capacitor;
- a reset transistor for controllably coupling a reset voltage to said photodiode;
- a memory reset transistor for controllably coupling the reset voltage to said capacitor;
- and
- a comparator, said comparator having a first signal terminal coupled to said capacitor, a second signal terminal coupled to a reference signal source and an output terminal;
- a column digital processing circuit, said column digital processing circuit further comprising,
- a digitizing subcircuit;
- and
- a processing subcircuit.
Dependencies are inferred from the claim text.