Back to results
US 6,686,282 B1Granted
Plated metal transistor gate and method of formation
AssigneeMotorola, Inc.
InventorsCindy Simpson, Hsing H. Tseng, Olubunmi O. Adetutu
Life of this patent
Estimating the term…
Abstract
Using plating, metal gates for N channel and P channel transistors are formed of different materials to achieve the appropriate work function for these N and P channel transistors. The plating is achieved with a seed layer consistent with the growth of the desired layer. The preferred materials are selected from the platinum metals, which comprise ruthenium, ruthenium oxide, iridium, palladium, platinum, nickel, osmium, and cobalt. These are attractive metals because they are relatively high conductivity, can be plated, and provide a good choice of work functions for forming P and N channel transistors.
Claims30
A method of providing gates for transistors comprising:
- providing a gate dielectric layer overlying a substrate;
- providing a first seed layer overlying the gate dielectric layer;
- forming a first metal layer having a first work function over said first seed layer by using plating;
- removing a portion of the first metal layer and the first seed layer;
- forming a second seed layer overlying the gate dielectric layer;
- forming a second metal layer having a second work function different from the first work function and over at least a portion of said second seed layer by using plating;
- forming a conductive gate material overlying both the first metal layer and the second metal layer;
- and
- forming a first gate stack and a second gate stack by removing a portion of each of the conductive gate material, the first metal layer, the second metal layer, the first seed layer and the second seed layer, the first gate stack retaining a first portion of the first seed layer and the second seed layer while the second gate stack retains only a second portion of the first seed layer.
6 more elements
Transistor gate structures comprising:
- a substrate;
- a gate dielectric layer overlying the substrate;
- a first seed layer overlying the gate dielectric layer within only a first gate stack;
- a first plated metal layer with a first work function and formed within the first gate stack and over said first seed layer;
- a second seed layer formed within both the first gate stack and a second gate stack and overlying the first plated metal layer in the first gate stack and overlying the gate dielectric layer in the second gate stack;
- a second plated metal layer with a second work function which differs from the first work function and formed within both the first gate stack and the second gate stack and overlying the second seed layer;
- and
- a conductive gate material overlying the second plated metal layer in both the first gate stack and the second gate stack.
5 more elements
Transistor gate structures comprising:
- a substrate;
- a gate dielectric layer overlying the substrate;
- a first seed layer overlying the gate dielectric layer within only a first gate stack;
- a first plated metal layer with a first work function and formed within the first gate stack and over said first seed layer;
- a second seed layer formed within both the first gate stack and a second gate stack and overlying the first plated metal layer in the first gate stack and overlying the gate dielectric layer in the second gate stack;
- a second plated metal layer with a second work function and formed only within the second gate stack and overlying the second seed layer;
- and
- a conductive gate material overlying the second seed layer in the first gate stack and the second plated metal layer in the second gate stack.
5 more elements
A method of providing gates for transistors comprising:
- providing a substrate;
- forming a dielectric layer overlying the substrate and having an upper surface, the dielectric layer having a first recessed trench region and a second recessed trench region where gates are subsequently formed;
- forming a seed layer overlying the dielectric layer and within the first recessed trench region and the second recessed trench region;
- masking a portion of the seed layer overlying the first recessed trench region;
- forming a first metal layer overlying a first unmasked portion of the seed layer to fill the second recessed trench with a first metal having a first work function, said first metal layer being formed by plating;
- masking the first metal layer;
- forming a second metal layer overlying a second unmasked portion of the seed layer to fill the first recessed trench with a second metal having a second work function different from the first work function, said second metal layer being formed by plating;
- and
- removing all material above the upper surface of the dielectric layer while retaining metal within each of the first recessed trench and the second recessed trench.
6 more elements
Transistor gate structures comprising:
- a substrate;
- a gate dielectric layer overlying the substrate, the gate dielectric layer having a first recessed trench region and a second recessed trench region;
- a metallic seed layer overlying the dielectric layer and within the first recessed trench region and the second recessed trench region;
- a first plated metal layer within the second recessed trench formed of a first metal having a first work function;
- and
- a second plated metal layer within the first recessed trench formed of a second metal having a second work function different from the first work function.
3 more elements
Dependencies are inferred from the claim text.