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AssigneeNEC Electronics Corporation
InventorKunihiko Higashi
Estimating the term…
A chip manufacturing method sets a first and a second section lines in parallel to each other along one side of each rectangular integrated circuit formed on a circuit substrate, and forms test wirings and test pads in gaps between the first and second section lines. After the circuit substrate is sectioned along the outer first section lines, a circuit test is conducted on resulting integrated circuits. After the circuit test is completed, a portion outside the second section line is cut away from each circuit chip. The test pads remain on circuit chips which are to undergo a circuit test, whereas no test pads remain on finished circuit chips which are to be shipped. It is therefore possible to prevent a user from fraudulently accessing the integrated circuit through the test pads of the circuit chip.
A chip manufacturing method for forming a number of substantially rectangular integrated circuits, each connected to at least one test pad through a test wiring, arranged through section lines on the surface of a circuit substrate, sectioning said circuit substrate along said section lines into said individual integrated circuits to form a number of circuit chips, and conducting a circuit test as required on at least some of said integrated circuits of a number of said circuit chips through said test pads, said method comprising the steps of:
A chip manufacturing method for forming a number of substantially rectangular integrated circuits, each connected to at least one test pad through a test wiring, arranged through section lines on the surface of a circuit substrate, section said circuit substrate along said section lines into said individual integrated circuits to form a number of said circuit chips, and conducting a circuit test as required on at least some of said integrated circuits of a number of said circuit chips through said test pads, said method comprising the steps of:
A chip manufacturing method for forming a number of substantially rectangular integrated circuits, each connected to at least one test pad through a test wiring, arranged through section lines on the surface of a circuit substrate, conducting a circuit test on at least some of said integrated circuits formed on said circuit substrate through said test pads, and sectioning said circuit substrate along said section lines into said individual integrated circuits after said circuit test is completed to form a number of circuit chips, said method comprising the steps of:
Dependencies are inferred from the claim text.