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US 6,674,120 B2Granted
Nonvolatile semiconductor memory device and method of operation thereof
AssigneeSony Corporation
InventorIchiro Fujiwara
Life of this patent
Estimating the term…
Abstract
A MONOS memory transistor capable of high speed write with a small current and superior in scaling, comprised of substrate (well W), a channel forming region, a first and a second impurity regions SBLi, SBLi+1 comprised of an opposite conductivity type semiconductor and sandwiching the channel forming region between them and acting as a source and a drain in operation, gate insulating films 10a, 10b, 14 and gate electrode WL on the channel forming region, and a charge storing means (carrier trap) which is formed in the gate insulating films 10a and 10b and dispersed in the plane facing the channel forming region and in the direction of thickness and is injected with hot holes caused by a band-to-band tunnel current from the impurity regions SLi or SLi+1 in operation.
Claims34
A nonvolatile semiconductor memory device comprising:
- a substrate;
- a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate;
- a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation;
- a gate insulating film provided on the channel forming region;
- a gate electrode provided on the gate insulating film;
- and
- a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions;
- wherein said first conductivity type is a p-type, and said second conductivity type is an n-type;
- and
- said gate insulating film comprises a first region into which hot holes are injected from said first impurity region, a second region into which hot holes are injected from said second impurity region, and a third region between the first and second regions and not injected by hot holes.
7 more elements
A nonvolatile semiconductor memory device comprising:
- a substrate;
- a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate;
- a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation;
- a gate insulating film provided on the channel forming region;
- a gate electrode provided on the gate insulating film;
- and
- a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions;
- wherein said gate insulating film comprises a first region into which hot holes are injected from said first impurity region, a second region into which hot holes are injected from said second impurity region, and a third region between the first and second regions and not injected by hot holes;
- and
- a plurality of memory transistors each including said channel forming region, said first and second impurity regions, said gate insulating film and said gate electrodes are arranged in both a word direction and a bit direction;
- said nonvolatile semiconductor memory device further comprising:
- a plurality of word lines for connecting the gate electrodes in the word direction;
- and
- word drive circuits connected to the plurality of word lines for applying a negative voltage to selected word lines to which memory transistors to be operated are connected, and a positive voltage to nonselected word lines to which memory transistors to be operated are not connected.
11 more elements
A nonvolatile semiconductor memory device comprising:
- a substrate;
- a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate;
- a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation;
- a gate insulating film provided on the channel forming region;
- a gate electrode provided on the gate insulating film;
- and
- a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions;
- wherein said gate insulating film comprises a first region into which hot holes are injected from said first impurity region, a second region into which hot holes are injected from said second impurity region, and a third region between the first and second regions and not injected by hot holes;
- and
- a plurality of memory transistors each including said channel forming region, said first and second impurity regions, said gate insulating film, and said gate electrodes, are arranged in both a word direction and a bit direction;
- said nonvolatile semiconductor memory device further comprises:
- a plurality of word lines;
- and
- a plurality of common lines which intersect with said plurality of word lines in an electrically insulated state;
- the plurality of said gate electrodes are respectively connected to said plurality of word lines;
- and
- the plurality of said first and second impurity regions are respectively coupled with the plurality of common lines.
14 more elements
A nonvolatile semiconductor memory device comprising:
- a substrate;
- a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate;
- a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation;
- a gate insulating film provided on the channel forming region;
- a gate electrode provided on the gate insulating film;
- a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions;
- and
- means for causing said hot holes by a band-to-band tunnel current;
- wherein said first conductivity type is a p-type, and said second conductivity type is an n-type.
6 more elements
A nonvolatile semiconductor memory device comprising:
- a substrate;
- a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate;
- a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation;
- a gate insulating film provided on the channel forming region;
- a gate electrode provided on the gate insulating film;
- a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions;
- and
- means for causing said hot holes by a band-to-band tunnel current;
- wherein a plurality of memory transistors each including said channel forming region, said first and second impurity regions, said gate insulating film and said gate electrodes are arranged in both a word direction and a bit direction;
- said nonvolatile semiconductor memory device further comprising:
- a plurality of word lines for connecting the gate electrodes in the word direction;
- and
- word drive circuits connected to the plurality of word lines for applying a negative voltage to selected word lines to which memory transistors to be operated are connected, and a positive voltage to nonselected word lines to which memory transistors to be operated are not connected.
10 more elements
A nonvolatile semiconductor memory device comprising:
- a substrate;
- a channel forming region comprised of a first conductivity type semiconductor and formed in the substrate;
- a first and a second impurity regions comprised of a second conductivity type semiconductor and formed in the substrate and sandwiching the channel forming region between them, acting as a source and a drain in operation;
- a gate insulating film provided on the channel forming region;
- a gate electrode provided on the gate insulating film;
- a charge storing means which is formed in the gate insulating film and dispersed in the plane facing the channel forming region and in a direction generally perpendicular to the gate electrode and is injected with hot holes at the time of operation from the first or the second impurity regions;
- and
- means for causing said hot holes by a band-to-band tunnel current;
- wherein a plurality of memory transistors each including said channel forming region, said first and second impurity regions, said gate insulating film, and said gate electrodes, are arranged in both a word direction and a bit direction;
- said nonvolatile semiconductor memory device further comprises:
- a plurality of word lines;
- and
- a plurality of common lines which intersect with said plurality of word lines in an electrically insulated state;
- the plurality of said gate electrodes are respectively connected to said plurality of word lines;
- and
- the plurality of said first and second impurity regions are respectively coupled with the plurality of common lines.
13 more elements
Dependencies are inferred from the claim text.