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US 6,674,109 B1Granted
Nonvolatile memory
AssigneeRohm Co., Ltd.
InventorsYoshikazu Fujimori, Takashi Nakamura
Life of this patent
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Abstract
An object of the invention is to decrease leakage current of a nonvolatile memory and to design improvement of memory characteristic thereof. The invention is characterized by comprising an FET of MFMIS structure having metal layer (M) and insulation layer (I) on boundary of a ferroelectrics and a semiconductor as a buffer layer, and further by letting an insulation barrier layer between a floating gate or a control gate and a ferroelectric layer.
Claims21
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric layer, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric layer and any one of said floating gate and said control gate,
- wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric layer, and
- wherein a band gap of said insulation barrier layer is larger than a band gap of said ferroelectric layer.
1 more element
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric layer, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric layer and any one of said floating gate and said control gate,
- wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric layer,
- wherein said insulation barrier layer comprises insulation material including composition elements of said ferroelectric layer, and
- wherein said floating gate of two layers film of iridium layer and iridium oxide layer is formed on the surface of the semiconductor substrate.
2 more elements
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric layer, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric layer and any one of said floating gate and said control gate,
- wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric layer, and
- wherein said ferroelectric layer is constructed with STN (Sr2(Ta1−xNbx)2Oy), x:
- 0<x<1, y:
- 0<y, and said insulation barrier layer includes at least one oxide of composition elements of said ferroelectric layer.
3 more elements
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric film, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric film and any one of said floating gate and said control gate,
- wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric film, and
- wherein said insulation barrier layer is constructed so as to satisfy the following expression when tin is placed for film thickness thereof, εin for dielectric constant, tf for film thickness of said ferroelectric film, and εf for dielectric constant of the ferroelectric film
- (εf/tf)<(εin/tin)<2(εf/tf).
2 more elements
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric layer, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric layer and any one of said floating gate and said control gate, wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric layer,
- wherein said insulation barrier layer comprises insulation material including composition elements of said ferroelectric layer, and
- wherein said insulation barrier layer is nitride of matter including aluminum, silicon, and the like in nitride of high melting point such as TaAlN, TaSiN, and the like.
1 more element
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric layer, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric layer and any one of said floating gate and said control gate, wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric layer,
- wherein said insulation barrier layer comprises insulation material including composition elements of said ferroelectric layer, and
- wherein said floating gate is two layers film of iridium layer and iridium oxide layer.
1 more element
A nonvolatile memory, comprising:
- an FET having MFMIS structure laminating in order of a floating gate, a ferroelectric layer, and a control gate on a surface of a semiconductor substrate through a gate insulation film which is provided between source/drain domains formed on the surface of the semiconductor substrate,
- wherein an insulation barrier layer stands between said ferroelectric layer and any one of said floating gate and said control gate,
- wherein a reading or a writing operation in the nonvolatile memory is performed by measuring a change in a resistance caused by a spontaneous polarization in the ferroelectric layer,
- wherein said insulation barrier layer comprises insulation material including composition elements of said ferroelectric layer, and
- wherein said control gate is two layers film of iridium layer and iridium oxide layer.
2 more elements
Dependencies are inferred from the claim text.