Sti pull-down to control SiGe facet growth

A SiGe bipolar transistor comprising:

• a semiconductor substrate having a collector and sub-collector present in a bipolar transistor device area, wherein said semiconductor substrate in said bipolar transistor device area has an upper surface and upper corner regions and said collector is formed between isolation regions that are also present in the semiconductor substrate, each of said isolation regions having a recessed surface and a non-recessed surface, said recessed surface is present below said upper surface of the semiconductor substrate and said non-recessed surface is coplanar with said upper surface of said semiconductor substrate;
• a SiGe layer located on top of said substrate as well as said recessed and non-recessed surfaces of each isolation region, said SiGe layer including polycrystalline Si regions located predominately atop said isolation regions and a SiGe base region located predominately atop said collector, said SiGe base region extends below the upper surface of the semiconductor substrate and beyond the upper corner regions of the semiconductor substrate in the bipolar device region;
• a patterned insulator layer atop said SiGe base region, said patterned insulator layer having an opening therein;
• and
• an emitter positioned on said patterned insulator layer and in contact with said SiGe base region through said opening.