Method of fabricating an integrated circuit
AssigneeSTMicroelectronics S.r.l.
InventorsOlivier Menut, Herve Jaouen
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Abstract
A method of fabricating an integrated circuit including a monocrystalline silicon substrate, a layer of polycrystalline silicon on the top surface of the substrate and doped with at least two dopants with different rates of diffusion, in which method annealing is performed at a temperature and for a time such that a first dopant diffuses into a first zone and a second dopant diffuses into a second zone larger than the first zone.
Claims20
A method of fabricating an integrated circuit including a monocrystalline silicon substrate having a top surface, the method comprising:
- forming at least one layer of polycrystalline silicon in direct contact with a top surface of a monocrystalline silicon substrate, wherein the polycrystalline silicon is doped with at least two dopants with different rates of diffusion;
- and
- annealing the polycrystalline silicon at a temperature and for a time such that a first dopant of the at least two dopants diffuses into a first zone and a second dopant of the at least two dopants diffuses into a second zone larger than the first zone, and the first dopant having a higher concentration in the first zone.
The method according to 1 claim, further comprising:
- forming a stack having an emitter window;
- wherein the forming the at least one layer of polycrystalline silicon includes:
- a first sublayer doped with a first dopant and in contact with the top surface of the monocrystalline silicon substrate in a bottom portion of the emitter window;
- a second sublayer doped with a second dopant;
- and
- a third sublayer doped with the first dopant;
- wherein the at least one layer of polycrystalline silicon is etched away except in the emitter window and an adjoining region.
The method according to 7 claim, further comprising:
- forming a stack having an emitter window;
- wherein the forming the at least one layer of polycrystalline silicon includes:
- a first sublayer doped with a first dopant and in contact with the top surface of the monocrystalline silicon substrate in a bottom portion of the emitter window;
- a second sublayer doped with a second dopant;
- and
- a third sublayer doped with the first dopant;
- wherein the at least one layer of polycrystalline silicon is etched away except in the emitter window and an adjoining region.
The method according to 10 claim, further comprising:
- forming a stack having an emitter window;
- wherein the forming the at least one layer of polycrystalline silicon includes:
- a first sublayer doped with a first dopant and in contact with the top surface of the monocrystalline silicon substrate in a bottom portion of the emitter window;
- a second sublayer doped with a second dopant;
- and
- a third sublayer doped with the first dopant;
- wherein the at least one layer of polycrystalline silicon is etched away except in the emitter window and an adjoining region.
Dependencies are inferred from the claim text.