US 6,673,689 B2 · Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same

Abstract

A high surface area capacitor comprising a double metal layer of an electrode metal and a barrier material deposited on hemispherical grain (HSG) silicon and a high dielectric constant (HDC) material deposited over the double metal layer. An upper cell plate electrode is deposited over the HDC material. The double metal layer preferably comprises one noble metal for the electrode metal and an oxidizable metal for the barrier material. The noble metal alone would normally allow oxygen to diffuse into and oxidize any adhesion layer and/or undesirably oxidize any silicon-containing material during the deposition of the HDC material. The barrier metal is used to form a conducting oxide layer or a conducting layer which stops the oxygen diffusion. The HSG polysilicon provides a surface roughness that boosts cell capacitance. The HDC material is also used to boost cell capacitance.

Claims38

Dependent claims

A method of forming a semiconductor capacitor, comprising:

forming a layer of conductive polysilicon;
disposing a barrier layer of oxidizable material on the layer of conductive polysilicon;
disposing a layer of electrode material on the barrier layer;
and
disposing a layer of dielectric material on the layer of electrode material.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application

10/159,892Filed 30 May 2002 · continuation

Priority

31 Aug 1999

Published

US 2002/0155658 A124 Oct 2002

Granted

6 Jan 2004

Term ends

Not estimatedThe source records don’t support an estimate.

Classification5 codes

H10D 1/712
Having non-planar surfaces, e.g. formed by texturisation: being rough surfaces, e.g. using hemispherical grains
H10B 12/315
Having a storage electrode stacked over the transistor: with the capacitor higher than a bit line
H10D 1/682
Capacitors having no potential barriers: having dielectrics comprising perovskite structures
H10D
Inorganic electric semiconductor devices

Family

Application09/386,833Parent of this division · filed 31 Aug 1999

Application09/892,594Parent of this continuation · filed 27 Jun 2001

US 6,281,543 B1Parent of this division · filed 28 Aug 2001

US 6,399,459 B2Parent of this continuation · filed 4 Jun 2002

US 2002/0155658 A1Pre-grant publication · published 24 Oct 2002

Application09/892,594Parent of this division

US 2001/0039097 A1Published application

US 6,673,689 B2This patent

From the US filing history. Foreign family members aren’t listed.

Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same

Life of this patent

Double layer electrode and barrier system on hemispherical grain silicon for use with high dielectric constant materials and methods for fabricating the same

Life of this patent

Abstract

Claims38