Method of forming a gate electrode contact spacer for a vertical DRAM device
AssigneeInfineon Technologies AG
InventorsArnd R. Scholz, Klaus M. Hummler
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AssigneeInfineon Technologies AG
InventorsArnd R. Scholz, Klaus M. Hummler
Estimating the term…
A gate electrode contact spacer (144) for a vertical DRAM device (100) and a method for forming the same. Memory cells (118) are formed within deep trenches (116) of a workpiece (112). A temporary spacer adjacent gate electrode contacts (132) and pad nitride layer are removed. A spacer material is deposited over exposed portions of the workpiece (112) and over the top and sides of the gate electrode contacts (132). The spacer material is removed from the horizontal surfaces of the DRAM device (100), including the exposed portions of the workpiece (112) and the top of the gate electrode contacts (132). Spacers (144) having sidewalls sloping downwardly away from the gate electrode contacts (132) are left remaining on the gate electrode contact (132) sides, preventing voids from forming during a subsequent array top oxide deposition. Spacers may also be formed adjacent top regions of isolation trenches simultaneously with the formation of spacers (144).
A method of providing replacement spacers, said replacement spacers proximate a semiconductor device formed in a trench defined in a semiconductor substrate, said semiconductor device having topographical features and temporary spacers adjacent the topographical features, the topographical features including top surfaces and vertical surfaces that extend above the top surface of said semiconductor substrate, and said temporary spacers filling said trench between said vertical surface and the sidewalls of said trench, the method comprising the steps of:
Dependencies are inferred from the claim text.