Lossless microstrip line in CMOS process

#1) Field of the Invention

#This invention relates generally to fabrication of semiconductor devices and more particularly to the fabrication of a microwave microstrip line and/or signal line in a conventional CMOS process.

#2) Description of the Prior Art

#The features and advantages of a semiconductor device according to the present invention and further details of a process of fabricating such a semiconductor device in accordance with the present invention will be more clearly understood from the following description taken in conjunction with the accompanying drawings in which like reference numerals designate similar or corresponding elements, regions and portions and in which:

#FIG. 1 shows a cross sectional view of a device having the signal line (microstrip) as a conductive line (near the substrate) except for the top metal line according to the prior art.

#FIG. 2 is a cross sectional view of a device the ground plane as the top metal line and the signal line (microstrip) as a conductive line over the dielectric (e.g., polyimide) layer according to the present invention.

#A. Problem Invention Solves

#Referring now to the drawings and more particularly to FIG. 1, there is shown a structure known to the inventors over which the present invention is an improvement. It is to be understood in this regard that no portion of FIG. 1 is admitted to be prior art for patentability of the present invention. Rather, this highly simplified diagram is an effort to provide an improved understanding of the problems that are overcome by the invention.

#FIG. 1 shows a silicon substrate 10 and conductive lines over the substrate. The first level conductive line 120 (e.g., Ml) is used as a signal line. FIG. 1 shows the electric field 121 generated by the signal line 120. In processes known to the inventor, the signal lines are formed in a conductive line over the substrate but the signal line is not the top metal line. The backside of the substrate is polished back so that the silicon substrate is only about 250 Å thick. Next, ground plane 147 is formed on the backside of the substrate 10.