US 6,664,167 B2Granted

Memory with trench capacitor and selection transistor and method for fabricating it

AssigneeInfineon Technologies AG

InventorsDietmar Temmler, Herbert Benzinger, Wolfram Karcher, Catharina Pusch, Martin Schrems, Jürgen Faul

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Abstract

A memory having a memory cell formed in a substrate and including a trench capacitor and a transistor and a method for producing the memory includes connecting the trench capacitor to the transistor with a self-aligned connection. The transistor at least partly covers the trench capacitor. The trench capacitor is filled with a conductive trench filling and an insulating covering layer is situated on the conductive trench filling. An epitaxial layer is situated above the insulating covering layer. The transistor is formed in the epitaxial layer. The self-aligned connection is formed in a contact trench and includes an insulation collar in which a conductive material is introduced. A conductive cap is formed on the conductive material.

Claims24

Dependent claims

A semiconductor memory, comprising:

a substrate;
at least two memory cells, each of said memory cells disposed at least partly in said substrate and each of said memory cells having:
a transistor having:
a drain region;
a source region;
and
a channel;
a first word line disposed between said source region and said drain region;
a trench capacitor having:
an inner electrode;
an outer electrode;
and
a dielectric layer disposed between said inner electrode and said outer electrode;
a trench disposed in said substrate and filled with a conductive trench filling forming said inner electrode of said trench capacitor;
an insulating covering layer disposed on said conductive trench filling;
an epitaxial layer disposed on said substrate and at least partly on said insulating covering layer;
said source region, said drain region, and said channel of said transistor disposed in said epitaxial layer;
a trench isolation disposed in said substrate and in said epitaxial layer, said trench isolation insulating adjacent ones of said memory cells from one another, said trench isolation respectively extending into said inner electrode of each of two adjacent ones of said memory cells;
said first word line disposed on said epitaxial layer and partly covering said trench;
a first insulation encapsulation surrounding said first word line;
a second word line disposed on said trench isolation;
a second insulation encapsulation surrounding said second word line;
a contact trench having a self-aligned connection electrically connecting said conductive trench filling to said drain region, said contact trench disposed between said first word line with said first insulation encapsulation and said second word line with said second insulation encapsulation;
and
said trench isolation bounding said contact trench.

22 more elements

A method for forming a semiconductor memory, which comprises:

providing a substrate having:
a surface;
a trench;
and
memory cells each having:
a transistor with a drain region, a source region, and a channel;
a first word line disposed between the source region and the drain region;
and
a trench capacitor having an inner electrode, an outer electrode, and a dielectric layer disposed between the inner electrode and the outer electrode;
filling the trench with a conductive trench filling to form the inner electrode of the trench capacitor;
forming an insulating covering layer on the conductive trench filling;
growing an epitaxial layer on the surface of the substrate and partly covering the insulating covering layer with the epitaxial layer;
forming a trench isolation to insulate adjacent memory cells from one another;
forming the first word line above the epitaxial layer;
forming a second word line above the trench isolation;
surrounding the first word line a first insulation encapsulation;
surrounding the second word line a second insulation encapsulation;
defining the source region and the drain region of the transistor in the epitaxial layer;
etching a contact trench through the epitaxial layer and the insulating covering layer as far as the conductive trench filling utilizing the first word line with the first insulation encapsulation and the second word line with the second insulation encapsulation as an etching mask for the etching of the contact trench;
and
forming a connection in the contact trench to electrically connect the conductive trench filling to the drain region.

18 more elements

Dependencies are inferred from the claim text.

Facts

Application: 10/085,940Filed 28 Feb 2002 · continuation
Priority: DE 199 41 14830 Aug 1999
Published: US 2002/0137278 A126 Sep 2002
Granted: 16 Dec 2003
Term ends: Not estimatedThe source records don’t support an estimate.

Classification3 codes

H10B 12/038
Making the capacitor or connections thereto: the capacitor being in a trench in the substrate
H10B 12/373
The capacitor being at least partially in a trench in the substrate: the capacitor extending under or around the transistor
H10B
Electronic memory devices