Method to fabricate a single gate with dual work-functions
AssigneeChartered Semiconductor Manufacturing Ltd.
InventorsChew Hoe Ang, Eng Hua Lim, Randall Cher Liang Cha, Jia Zhen Zheng, Elgin Quek, Mei Sheng Zhou, Daniel Yen
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Abstract
A method for forming a single gate having a dual work-function is described. A gate electrode is formed overlying a gate dielectric layer on a substrate. Sidewalls of the gate electrode are selectively doped whereby the doped sidewalls have a first work-function and whereby a central portion of the gate electrode not doped has a second work-function to complete formation of a single gate having multiple work-functions in the fabrication of integrated circuits.
Claims22
A method of forming a single gate having multiple work-functions in the fabrication of integrated circuits comprising:
- depositing a gate material layer overlying a gate dielectric layer on a substrate;
- patterning said gate material layer to form a gate electrode;
- selectively doping sidewall portions of said gate electrode using isotropic plasma enhanced ion doping wherein said substrate is not biased whereby said doped sidewall portions have a first work-function and whereby a central portion of said gate electrode not doped in said selectively doping step has a second work-function;
- and
- annealing said substrate in a nitrogen ambient after said doping step to drive-in said dopants into said gate electrode to complete formation of a single gate having multiple work-functions in the fabrication of integrated circuits.
A method of forming a single gate having multiple work-functions in the fabrication of integrated circuits comprising:
- depositing a gate material layer overlying a gate dielectric layer on a substrate;
- patterning said gate material layer to form a gate electrode;
- selectively doping sidewall portions of said gate electrode using isotropic plasma enhanced ion doping wherein said substrate is not biased wherein each of said sidewall portions of said gate is doped differently whereby one of said sidewall portions has a first work-function and wherein another of said sidewall portions has a third work-function and whereby a central portion of said gate electrode not doped in said selectively doping step has a second work-functions and
- annealing said substrate in a nitrogen ambient after said doping step to drive-in said dopants into said sate electrode to complete formation of a single gate having multiple work-functions in the fabrication of integrated circuits.
A method of forming a single gate having multiple work-functions in the fabrication of integrated circuits comprising:
- depositing a gate material layer overlying a gate dielectric layer on a substrate;
- patterning said gate material layer to form a gate electrode;
- masking a top portion of said gate electrode and selectively doping sidewall portions of said gate electrode using isotropic plasma enhanced ion doping wherein said substrate is not biased whereby said dopants dope said sidewall portions of said gate electrode and do not dope a central portion of said gate electrode whereby said doped sidewall portions have a first work-function and whereby said central portion of said gate electrode not doped in said selectively doping step has a second work-function;
- and
- annealing said substrate in a nitrogen ambient to drive-in said dopants into said gate electrode to complete formation of a single gate having multiple work-functions in the fabrication of integrated circuits.
Dependencies are inferred from the claim text.