Semiconductor chip assembly with simultaneously electrolessly plated contact terminal and connection joint

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a support circuit that includes an insulative base and a conductive trace, wherein the insulative base includes a through-hole, the conductive trace is disposed above and overlaps and is electrically isolated from the pad, and the through-hole exposes the conductive trace and the pad;
• and then
• electrolessly plating a connection joint on the conductive trace and the pad, thereby electrically connecting the conductive trace and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a support circuit with first and second surfaces, wherein the support circuit includes an insulative base and a conductive trace, the insulative base includes a through-hole, the first surface faces away from the chip, the second surface faces towards the chip, the conductive trace includes a pillar and a routing line, the pillar extends from the base at the first surface and is spaced from the through-hole, the routing line is spaced from the first surface and disposed at the second surface, and the through-hole exposes the routing line and the pad;
• and then
• simultaneously electrolessly plating a contact terminal on the pillar and a connection joint on the routing line and the pad.

A method of manufacturing a semiconductor chip assembly, comprising the following steps in the sequence set forth:

• providing a semiconductor chip, a support circuit and an insulative adhesive, wherein the chip includes first and second surfaces, the first surface includes a conductive pad, the support circuit includes third and fourth surfaces, the support circuit includes an insulative base, a conductive trace that extends into the base, and a through-hole that extends through the base, the conductive trace includes a pillar and a routing line, the pillar extends from the base, the third surface includes the pillar and the base and faces away from the chip, the fourth surface includes the routing line and faces towards the chip, the adhesive contacts the first and fourth surfaces thereby mechanically attaching the chip to the support circuit, and the through-hole exposes the routing line and the pad from the third surface;
• simultaneously electrolessly plating the contact terminal on the pillar and a first portion of the connection joint on the routing line and a second portion of the connection joint on the pad without contacting the first and second portions of the connection joint and without electrically connecting the routing line and the pad;
• and
• simultaneously electrolessly plating the contact terminal on the pillar and the first portion of the connection joint on the routing line and the second portion of the connection joint on the pad such that the first and second portions of the connection joint contact one another thereby electrically connecting the routing line and the pad.

A method of manufacturing a semiconductor chip assembly, comprising the following steps in the sequence set forth:

• providing a semiconductor chip, a support circuit and an insulative adhesive, wherein the chip includes first and second surfaces, the first surface includes a conductive pad, the support circuit includes third and fourth surfaces, the support circuit includes an insulative base, a conductive trace within the base, and a through-hole that extends through the base, the conductive trace includes a pillar and a routing line, the pillar extends from the base, the third surface includes the pillar and the base and faces away from the chip, the fourth surface includes the routing line and faces towards the chip, the adhesive contacts the first and fourth surfaces thereby mechanically attaching the chip to the support circuit, and the through-hole exposes the conductive trace and the pad from the third surface;
• simultaneously electroplating a metal on the pillar and the routing line and electrolessly plating the metal on the pad;
• and
• simultaneously electrolessly plating the metal on the electroplated metal on the pillar and the routing line, thereby providing a contact terminal that includes the electrolessly plated metal on the electroplated metal on the pillar and providing a connection joint that includes the electrolessly plated metal on the pad and that is between and electrically connects the routing line and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a conductive trace;
• then
• disposing an insulative adhesive between the chip and the conductive trace, thereby mechanically attaching the chip to the conductive trace such that the conductive trace overlaps the pad;
• then
• etching the adhesive, thereby exposing portions of the conductive trace and the pad;
• and then
• electrolessly plating a connection joint on the conductive trace and the pad, thereby electrically connecting the conductive trace and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a conductive trace with first and second surfaces that are opposite one another and a peripheral sidewall between the surfaces;
• then
• disposing an insulative adhesive between the chip and the conductive trace, thereby mechanically attaching the chip to the conductive trace such that the first surface faces away from the pad and the peripheral sidewall overlaps the pad;
• then
• etching the adhesive, thereby exposing the pad;
• and then
• electrolessly plating a connection joint on the first surface, the peripheral sidewall and the pad such that the connection joint extends between the peripheral sidewall and the pad, thereby electrically connecting the conductive trace and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a conductive trace with first and second surfaces that are opposite one another and a peripheral sidewall between the surfaces;
• then
• disposing an insulative adhesive between the chip and the conductive trace, thereby mechanically attaching the chip to the conductive trace such that the first surface faces away from the pad;
• then
• etching the adhesive, thereby exposing the peripheral sidewall and the pad;
• and then
• electrolessly plating a connection joint on the first surface, the peripheral sidewall and the pad, thereby electrically connecting the conductive trace and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a conductive trace;
• then
• disposing an insulative adhesive between the chip and the conductive trace, thereby mechanically attaching the chip to the conductive trace such that the conductive trace overlaps the pad;
• then
• forming an opening in the adhesive, thereby exposing portions of the conductive trace and the pad;
• and then
• plating a connection joint that includes an electrolessly plated metal on the conductive trace and the pad, thereby electrically connecting the conductive trace and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a conductive trace;
• then
• disposing an insulative adhesive between the chip and the conductive trace, thereby mechanically attaching the chip to the conductive trace such that the conductive trace overlaps the pad;
• then
• forming an opening in the adhesive, thereby exposing portions of the conductive trace and the pad;
• and then
• plating a connection joint that includes an electroplated metal and an electrolessly plated metal on the conductive trace and the pad, thereby electrically connecting the conductive trace and the pad.

A method of manufacturing a semiconductor chip assembly, comprising:

• providing a semiconductor chip that includes a conductive pad;
• providing a conductive trace;
• then
• disposing an insulative adhesive between the chip and the conductive trace, thereby mechanically attaching the chip to the conductive trace such that the conductive trace overlaps the pad;
• then
• forming an opening in the adhesive, thereby exposing portions of the conductive trace and the pad;
• and then
• plating a connection joint on the conductive trace and the pad, thereby electrically connecting the conductive trace and the pad.