P-i-n transit time silicon-on-insulator device
AssigneeTexas Instruments Incorporated
InventorsJeffrey A. Babcock, Gregory E. Howard, Angelo Pinto, Phillipp Steinmann
Life of this patent
Estimating the term…
Loading patent…
AssigneeTexas Instruments Incorporated
InventorsJeffrey A. Babcock, Gregory E. Howard, Angelo Pinto, Phillipp Steinmann
Estimating the term…
A transit time device (15, 15′) in a silicon-on-insulator (SOI) technology is disclosed. An anode region (18) and a cathode region (20) are formed on opposing ends of an epitaxial layer (14), with an intrinsic or lightly-doped region (22) disposed therebetween. Sinker structures (30p, 30n) are formed in an overlying epitaxial layer (24) over and in contact with the anode and cathode regions (18, 20). A charge injection terminal may be formed in a sinker structure (32n) in the overlying epitaxial layer (24), if the transit time device (15′) is of the three-terminal type. The device (15, 15′) has extremely low parasitic capacitance to substrate, because of the buried oxide layer (12) underlying the intrinsic region (22).
A method of forming a transit time device in a semiconductor layer overlying an insulator layer, comprising the steps of:
Dependencies are inferred from the claim text.