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US 6,660,582 B2Granted
Method of forming a vertical field-effect transistor device
AssigneeInfineon Technologies AG
InventorsAlbert Birner, Matthias Goldbach
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Abstract
It is proposed when forming field-effect transistor devices in a semiconductor substrate for the overlapping region of a source-drain region that is to be provided to be formed directly as a material region, in particular with outdiffusion processes being avoided to the greatest extent. This takes place in particular by forming the connection region or buried-strap region as selectively epitaxially grown-on single-crystal, possibly doped silicon.
Claims58
A method of forming a field-effect transistor device, which comprises the steps of:
- providing a semiconductor substrate;
- forming a connection region in the semiconductor substrate;
- forming a conductivity region in the semiconductor substrate;
- forming a source drain region, the connection region extending to the source-drain region for connecting the field-effect transistor device to the conductivity region;
- and
- forming a potential source-drain channel path of the field-effect transistor device by providing a gate insulating region to an overlapping region of at least one of the source-drain region and the connection region, the overlapping region being formed directly as a material region with outdiffusion processes being avoided.
3 more elements
Dependencies are inferred from the claim text.