Electrical connector with retention posts

An electrical connector connecting an electronic package with a circuit substrate, the electrical connector comprising:

• an insulative housing defining a plurality of terminal passageways;
• a plurality of terminals received in corresponding passageways of the housing, respectively;
• wherein the insulating housing define a plurality of complementary posts or recesses having different cross sectional areas and the electronic package define a plurality of complementary posts or recesses having different cross sectional areas;
• wherein the plurality of posts extending upwardly from two diagonally opposite corners of the housing or two diagonally opposite corners of the electronic package respectively;
• wherein a height of each of the posts is different from a height of the other post;
• wherein the plurality of recesses are defined in the electronic package or at two diagonally opposite corner portions of the housing corresponding to the posts, and the two recesses are blind;
• wherein a depth of each of the recesses is different from a depth of the other recess.

An electrical connector assembly comprising:

• a rectangular insulative housing defining a plurality of passageways in a matrix type;
• a plurality of terminals disposed in the corresponding passageways, respectively, with tips extending above an upper face of the housing;
• a LGA (Land Grid Array) chip positioned upon the upper face of the housing to impose downward forces upon the upwardly exposed tips of the terminals to downwardly deflect the corresponding terminals for electrical connection therebetween, said LGA chip defining thereon a bottom face closely confronting the upper face of the housing;
• a pair of posts extending from two diagonally opposite corners of one of said upper face of the housing and two diagonally opposite corners of said bottom face of the LGA chip toward the other;
• and
• a pair of holes recessed from the other of said upper face of the housing and said bottom face of the LGA chip away from said one;
• wherein
• alignment between said LGA chip and said housing is derived from interengagement between the pair of posts and the pair of holes only, without involvement of any confinement imposed upon a periphery of said LGA chip.