US 6,656,812 B1 · Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process

Abstract

A vertical bipolar transistor includes a semiconductor substrate, an extrinsic collector layer in the semiconductor substrate, an intrinsic collector on the extrinsic collector, a lateral isolating region surrounding an upper part of the intrinsic collector, an offset extrinsic collector well, a base including a semiconductor region above the intrinsic collector and above the lateral isolating region including at least one silicon layer, and a doped emitter surrounded by the base. The doped emitter may include first and second parts. The first part may be formed from single-crystal silicon and in direct contact with the upper surface of the semiconductor region in a predetermined window in the upper surface above the intrinsic collector. The second part may be formed from polycrystalline silicon. The two parts of the emitter may be separated by a separating oxide layer spaced apart from the emitter-base junction of the transistor.

Claims14

Dependent claims

A method of fabricating a bipolar transistor comprising:

forming an intrinsic collector on an extrinsic collector layer in a semiconductor substrate;
forming a lateral isolating region adjacent an upper part of the intrinsic collector;
forming a base on the upper part of the intrinsic collector and on the lateral isolating region;
and
forming an emitter by
forming a first emitter part comprising single-crystal silicon in contact with portions of the base,
forming a separating oxide layer on the first emitter part, and
forming a second emitter part comprising polycrystalline silicon on the separating oxide layer so that the separating oxide layer completely separates the second emitter part from the first emitter part.

5 more elements

A method of fabricating a vertical bipolar transistor comprising:

forming an intrinsic collector on an extrinsic collector layer in a semiconductor substrate;
forming an offset extrinsic collector well on said extrinsic collector and spaced apart from an upper part of the intrinsic collector;
forming a lateral isolating region surrounding an upper part of the intrinsic collector and also surrounding the offset extrinsic collector well;
forming a base on the upper part of the intrinsic collector and on the lateral isolating region by growing at least one silicon layer using non-selective epitaxy;
and
forming an in-situ doped emitter by
forming a first emitter part comprising single-crystal silicon in contact with portions of the base,
forming a separating oxide layer on the first emitter part and spaced apart from an emitter-base junction of the vertical bipolar transistor, and
forming a second emitter part comprising polycrystalline silicon on the separating oxide layer so that the separating oxide layer completely separates the second emitter part from the first emitter part.

6 more elements

Dependencies are inferred from the claim text.

Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process

Life of this patent

Vertical bipolar transistor having little low-frequency noise and high current gain, and corresponding fabrication process

Life of this patent

Abstract

Claims14