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US 6,656,646 B2Granted
Fabrication method of semiconductor integrated circuit device
AssigneeHitachi, Ltd.
InventorsShoji Hotta, Norio Hasegawa
Life of this patent
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Abstract
A pattern accuracy of a semiconductor integrated circuit device is to be improved. When an ordinary photomask is to be replaced with a resist mask, in setting a planar size of a shielding pattern formed by resist film, a correction quantity L is subtracted from a planar size of a corresponding shielding pattern formed of metal. Conversely, when the resist mask is to be replaced with the ordinary mask, in setting a planar size of the shielding pattern formed of metal, the correction quantity L is added to the planar size of the corresponding shielding pattern formed by resist film.
Claims18
A method of fabricating a semiconductor integrated circuit device, comprising the steps of:
- (a) providing a first photomask having a first light-shielding film having a first thickness, said first light-shielding film having first light-transmitting portions and first light-shielding portions arranged to produce a first predetermined projected exposure pattern corresponding to an integrated circuit, said first light-shielding portions having first transverse dimensions;
- (b) making a projection exposure through said first photomask onto a first photosensitive substrate;
- (c) providing a second photomask having a second light-shielding film having a second thickness different from said first thickness, said second light-shielding film having second light-transmitting portions and second light-shielding portions arranged to produce a second predetermined projected exposure pattern corresponding to said integrated circuit, said second light-shielding portions having second transverse dimensions different from said first transverse dimensions;
- and
- (d) making a projection exposure through said second photomask onto a second photosensitive substrate;
- wherein said second transverse dimensions are selected such that said second photomask produces essentially the same projection exposure pattern as said first photomask.
3 more elements
A method of fabricating a semiconductor integrated circuit device, comprising the steps of:
- (a) transferring a pattern onto a first photoresist layer over a semiconductor substrate by a reducing projection exposure process using a first photomask having an inorganic first light-shielding film having a first thickness, said first light-shielding film having first light-transmitting portions and first light-shielding portions arranged to produce a first predetermined projected exposure pattern corresponding to an integrated circuit, said first light-shielding portions having first transverse dimensions;
- and
- (b) transferring a second pattern onto a second photoresist layer over the semiconductor substrate by a reducing projection exposure process using an organic second light-shielding film having a second thickness greater than said first thickness, said second light-shielding film having second light-transmitting portions and second light-shielding portions arranged to produce a second predetermined projected exposure pattern corresponding to said semiconductor integrated circuit,
- wherein for a given pattern dimension on said semiconductor substrate said second light-shielding portions have second transverse dimensions smaller than said first transverse dimensions of said first light-shielding portions of said first light-shielding film.
1 more element
A method of fabricating an integrated circuit device, comprising the steps of:
- transferring a predetermined pattern onto a photosensitive substrate by a reducing projection exposure process using a photomask having first and second mask regions;
- said first mask region having a first light-shielding film comprising an inorganic film having a first thickness, said first light-shielding film having first light-transmitting portions and first light-shielding portions arranged to produce a first predetermined projected exposure pattern corresponding to a first portion of an integrated circuit, said first light-shielding portions having first transverse dimensions;
- said second mask region having a second light-shielding film comprising an organic film having a second thickness greater than said first thickness, said second-light-shielding film having second light-transmitting portions and second light-shielding portions arranged to produce a second predetermined projected exposure pattern corresponding to a second portion of the integrated circuit,
- wherein for a given pattern dimension on the substrate, said second light-shielding portions have second transverse dimensions smaller than said first transverse dimensions of said first light-shielding portions of said first mask region.
1 more element
Dependencies are inferred from the claim text.