Semiconductor integrated circuit device, and method of placement and routing for such device

A semiconductor integrated circuit device comprising:

• a plurality of integrated circuit blocks, said integrated circuit blocks being interconnected by wiring;
• a plurality of block terminals provided in circumferential edge portions of a block layout;
• and
• a plurality of terminal cells each provided inside of said block layout for use in connecting with a terminal in said integrated circuit block, said terminal cells each including a terminal target metal that is different from, and formed in a layer higher at least by one layer than, ordinary target metals originally included in a block netlist;
• wherein
• an interconnection among said integrated circuit blocks is carried out by way of said block terminals provided in circumferential edge portions of a block layout and said terminal target of said terminal cells.

A semiconductor integrated circuit device comprising:

• a plurality of integrated circuit blocks, said integrated circuit blocks being interconnected by wiring;
• a plurality of block terminals provided in circumferential edge portions of a block layout;
• and
• at least one of terminal cells each provided inside of said block layout for use in connecting with a terminal in said integrated circuit block, said terminal cells each including a terminal target metal that is different from, and formed in a layer higher at least by one layer than, ordinary target metals originally included in a block netlist;
• wherein
• a metal provided as a target by said terminal cells each is formed including a plurality of cells which have a structure of any one of single layered and multi-layered and include said target metal different from each other, and
• wherein
• an interconnection among said integrated circuit blocks is carried out by preferentially placing said terminal cells according to a direction of wiring connection with said integrated circuit block and to a preferential wiring direction, and by interconnecting said integrated circuit blocks by way of said block terminals provided in circumferential edge portions on a block layout and said terminal target of said terminal cells.

A method for placement and routing of a semiconductor integrated circuit device, comprising the steps of:

• forming a block netlist;
• forming a plurality of terminal cells each including a terminal target metal that is different from, and formed in a layer higher at least by one layer than, ordinary target metals originally included in said block netlist;
• adding said terminal cell to an input/output terminal included in said block netlist, to be subsequently adopted newly as a block terminal;
• obtaining coordinates of said terminal cell from a layout obtained through autoplacement and routing steps;
• forming a layout including only said terminal cells;
• providing block terminals in circumferential edge portions on said block layout by laying out said layout thereonto;
• forming a block layout for a terminal target provided in said integrated circuit block with each of said terminal cells as a termination;
• and
• interconnecting said integrated circuit blocks by way of said block terminals provided in circumferential edge portions on a block layout and said terminal target of said terminal cells.

A semiconductor integrated circuit device comprising:

• a plurality of integrated circuit blocks, said integrated circuit blocks being interconnected by wiring:
• a plurality of block terminals provided in circumferential edge portions of a block layout;
• and
• a plurality of terminal cells each provided inside of said block layout for use in connecting with a terminal in said integrated circuit block, said terminal cells each including a terminal target metal that is different from, and formed in a layer higher at least by one layer than, ordinary target metals originally included in a block netlist representing original connections within said integrated circuit blocks including connections to the plurality of block terminals, wherein said terminal target metal is used for providing connection to at least one other integrated circuit block in lieu of at least a portion of the plurality of block terminals;
• wherein
• an interconnection among said integrated circuit blocks is carried out by way of said block terminals provided in circumferential edge portions of a block layout and said terminal target metal of said terminal cells.