Nitride read-only memory cell for improving second-bit effect and method for making thereof

A fabrication method for a nitride read only memory cell for reducing a second-bit effect, comprising:

• providing a substrate;
• forming a silicon oxide/silicon nitride/silicon oxide layer on the substrate;
• forming a gate on the silicon oxide/silicon nitride/silicon oxide layer;
• forming a mask over the silicon oxide/silicon nitride/silicon oxide layer, wherein the mask exposes a region beside the gate;
• performing a shallow pocket implanting process to form a shallow doped region in the substrate beside the gate, wherein the shallow pocket doped region in the substrate comprises a first depth of less than 400 angstroms;
• removing the mask;
• and
• forming a source/drain region in the substrate beside the gate, wherein a minimum depth of a current path for a current flow to the source/drain region during a forward read is a second depth, wherein the second depth is greater than the first depth.

A method for fabricating a nitride read-only memory cell for reducing the second-bit effect, comprising:

• providing a substrate;
• forming a silicon oxide/silicon nitride/silicon oxide layer on the substrate;
• forming a gate on the silicon oxide/silicon nitride/silicon oxide layer;
• performing a shallow pocket implantation to form a shallow pocket doped region with a depth of less than 400 angstroms in the substrate, wherein the depth is shallower than a shallowest current path under the shallow doped region during a forward read;
• and
• forming a source/drain region in the substrate.