Fast line dump structure for solid state image sensor
AssigneeEastman Kodak Company
InventorEric G. Stevens
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Abstract
The present invention is a structure for a fast-dump gate (FDG) and a fast-dump drain (FDD) for a charge coupled device. It is envisioned that the charge coupled device be a horizontal readout register of a solid-state image sensor. This structure uses a third layer of polysilicon (or other suitable gate material) to form the fast-dump gate which is in addition to the other two layers of gate material used to form the gates in the horizontal readout register. This allows the channel region under the fast-dump gate (FDG) to form without the use of highly-doped channel stop regions thereby eliminating any potential wells or barriers that may result in transfer inefficiency often time found with other structures.
Claims11
A method of forming a fast-dump gate (FDG) and a fast-dump drain (FDD) on a charge coupled device having comprising the steps of:
- forming a charge coupled device formed upon a substrate with at least a first level and a second level of polysilicon layers used to form a plurality of electrodes on the charge coupled device;
- creating another polysilicon level to form the fast-dump gate adjacent to at least one of the electrodes of the charge coupled device;
- and
- coupling the fast-dump drain to the fast-dump gate.
Dependencies are inferred from the claim text.