Non-volatile memory and operating method thereof

A method for operating a non-volatile memory, the non-volatile memory comprising a plurality of memory cells, a plurality of word lines, a plurality of drain lines and a plurality of source lines, wherein

• two adjacent memory cells in a row share a source and are grouped into a cell pair, while the memory cells are divided into a plurality of cell pairs arranged in rows and columns, and two adjacent cell pairs in a row share a drain;
• the sources of the memory cells in the same row are connected to a source line;
• the drains of the memory cells in the same row are connected to a drain line;
• and
• the gates of the memory cells in the same column are coupled to a word line, the method comprising:
• during a programming operation of a selected memory cell, applying a first positive voltage to the word line coupled to the selected memory cell, applying a second positive voltage to the drain line coupled to the selected memory cell, and applying 0V to the source line coupled to the selected memory cell, wherein the first positive voltage and the second positive voltage are sufficiently high to induce channel hot electron injection phenomenon for programming a drain side of the selected memory cell;
• and
• during an erasing operation of the selected memory cell, applying a first negative voltage to the word line coupled to the selected memory cell, applying a third positive voltage to the drain line coupled to the selected memory cell, and applying 0V to the source line coupled to the selected memory cell, wherein a difference between the first negative voltage and the third positive voltage is sufficiently large to induce band-to-band hot hole injection phenomenon for erasing the drain side of the selected memory cell.

A method for operating a non-volatile memory, the memory comprising a plurality of memory cells, a plurality of word lines, a plurality of drain lines and a plurality of source lines, wherein

• two adjacent memory cells in a row share a source and are grouped into a cell pair, while the memory cells are divided into a plurality of cell pairs arranged in rows and columns, and two adjacent cell pairs in a row share a drain;
• the sources of the memory cells in the same row are connected to a source line;
• the drains of the memory cells in the same row are connected to a drain line;
• and
• the gates of the memory cells in the same column are coupled to a word line,
• the method comprising:
• during an erasing operation of a selected memory cell, applying a first positive voltage to the word line coupled to the selected memory cell, and applying 0V to the drain line and the source line coupled to the selected memory cell, wherein the first voltage is sufficiently high to induce Fowler-Nordheim tunneling phenomenon for erasing a drain side and a source side of the selected memory cell;
• and
• during an programming operation of the selected memory cell, applying a first negative voltage to the word line coupled to the selected memory cell, applying a second positive voltage to the drain line coupled to the selected memory cell, and applying 0V to the source line coupled to the selected memory cell, wherein a difference between the first negative voltage and the second positive voltage is sufficiently large to induce band-to-band hot hole injection phenomenon for programming the drain side of the selected memory cell.