Floating gate semiconductor device
AssigneeSeiko Epson Corporation
InventorKenji Yamada
Life of this patent
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Abstract
A semiconductor device has a floating gate having a side wall with a generally vertical upper section and a tapered lower section and a first insulation film formed on the side wall of the floating gate by thermal oxidation. The first insulation film has an upper section and a lower section that is thicker than the upper section. The semiconductor device also has a second insulation film formed on the first insulation film, and a control gate formed on the second insulation film. As a result, an insulation film between the control gate and the floating gate has a sufficient thickness difference between the upper section and the lower section of the floating gate.
Claims23
A semiconductor device comprising:
- a floating gate having a side wall with a generally vertical upper section and a tapered lower section;
- a single layer of insulation film formed on the side wall by thermal oxidation, the single layer of insulation film having an upper section and a lower section thicker than the upper section;
- a second layer of insulation film formed on the single layer of insulation film;
- and
- a control gate formed on the second insulation film.
A semiconductor device, comprising:
- a floating gate having a side wall with a generally vertical upper section and an outwardly tapered lower section;
- a control gate;
- and
- a composite insulation layer disposed between the floating gate and the control gate, comprising:
- a single layer of insulation film formed on the side wall, and
- a second layer of insulation film formed on the single layer of insulation film, wherein the control gate is formed on the second insulation film,
- wherein the thickness of the composite insulation layer between an upper portion of the generally vertical upper section of the floating gate and the control gate is substantially equal to the thickness of the second layer of insulation film to thereby provide the composite insulation layer having substantially a first dielectric strength between the upper portion of the generally vertical upper section of the floating gate and the control gate.
A semiconductor device, comprising:
- a floating gate having a side wall with a generally vertical upper section and a tapered lower section;
- a control gate;
- and
- a composite insulation layer disposed between the floating gate and the control gate comprising:
- a single layer of insulation film formed on the side wall,
- wherein the single layer of insulation film has an upper section and a lower section thicker than the upper section, such that there is a thickness difference in the single layer of insulation film between the lower section and the upper section thereof, and
- a second layer of insulation film formed on only the single layer of insulation film,
- wherein the control gate is formed on the second layer of insulation film,
- wherein the thickness of the composite insulation layer between an upper portion of the generally vertical upper section of the floating gate and the control gate is substantially equal to the thickness of the second layer of insulation film.
Dependencies are inferred from the claim text.