Fabricating memory device having buried source/drain region and fabrication thereof
AssigneeMacronix International Co., Ltd.
InventorShui-Chin Huang
Life of this patent
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Abstract
A method of fabricating a memory device having a buried source/drain region is provided, in which a dielectric layer and a word-line is sequentially formed on the substrate, then a buried source/drain region is formed in the substrate. After that, a barrier layer is formed on the exposed surface of the word-line, then a metal layer is formed over the substrate. The metal layer is patterned to leave a portion covering the buried source/drain region beside the word-line and crossing over the word-line.
Claims27
A method of fabricating a memory device having a buried source/drain region, comprising the steps of:
- providing a substrate;
- forming a dielectric layer on the substrate;
- forming a word-line over the substrate;
- forming a buried source/drain region in the substrate, wherein the buried source/drain region is in a direction perpendicular to the word-line;
- forming a barrier layer on an exposed surface of the word-line;
- forming a metal layer over the substrate;
- and
- patterning the metal layer to leave a portion of the metal layer covering the buried source/drain region beside the word-line and crossing over the word-line, so that the patterned metal layer is in parallel connection with the buried source/drain region, wherein the patterned metal layer is in a direction parallel to the buried source/drain region.
A method of fabricating a mask read-only memory (Mask ROM), comprising the steps of:
- providing a substrate;
- forming a dielectric layer on the substrate;
- forming a plurality of buried bit-lines in the substrate;
- forming a plurality of word-lines over the substrate and crossing over the buried bit-lines, wherein the buried bit-lines are in a direction perpendicular to the word-lines;
- forming a barrier layer on exposed surfaces of the word-lines;
- forming a metal layer over the substrate;
- patterning the metal layer to leave a portion of the metal layer covering the buried bit-lines beside the word-lines and crossing over the word-lines, so that the patterned metal layer is in parallel connection with the buried bit-lines, wherein the patterned metal layer is in a direction parallel to the buried bit-lines;
- and
- performing a coding process to form a plurality of coding regions in the substrate.
A method of fabricating a nitride read-only memory (NROM), comprising the steps of:
- providing a substrate;
- forming a plurality of buried bit-lines in the substrate;
- forming a trapping layer on the substrate;
- forming a plurality of word-lines on the trapping layer and crossing over the buried bit-lines, wherein the buried bit-lines are in a direction perpendicular to the word-lines;
- forming a barrier layer on exposed surfaces of the word-lines;
- forming a metal layer over the substrate;
- and
- patterning the metal layer to leave a portion of the metal layer covering the buried bit-lines beside the word-lines and crossing over the word-lines, so that the patterned metal layer is in parallel connection with the buried bit-lines, wherein the patterned metal layer is in a direction parallel to the buried bit-lines.
Dependencies are inferred from the claim text.