Method and device for providing double cell density in SDRAM and in DDR SDRAM

Abstract

Method and device for providing double cell density in synchronous dynamic random access memory (SDRAM) and in double data rate synchronous dynamic random access memory (DDR SDRAM) are disclosed. In specific embodiments, a conventional photolithography technology is used to define a cell area on a semiconductor substrate and then a trench capacitor is formed in the cell area. After that, an array device active area is defined on the cell area and STIs are formed beside the array device active area in the semiconductor substrate. Next, a polysilicon layer is subsequently deposited, photolithographed and anisotropically etched to form an array device polysilicon layer. A gate oxide layer, a gate conductive layer and a gate cap are subsequently formed on the semiconductor substrate and cell area according to the following steps in specific embodiments. A silicon oxide layer, a polysilicon layer and a nitride layer are subsequently deposited on the semiconductor substrate and cell area and then the horizontal portions of the three layers above STI are removed by anisotropic etching. A contact window is formed on the top of the array device polysilicon layer. The top of the array device polysilicon layer is doped with ion implantation through the contact window. Finally, the contact window is filled with polysilicon to form a contact plug.

Dependencies are inferred from the claim text.