CMOS device with trench structure
AssigneeFuji Electric Co., Ltd.
InventorsShinichi Jimbo, Jun Saito
Life of this patent
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Abstract
A semiconductor device is provided having a high voltage driver IC reducing malfunction or device destruction. A high voltage IC chip includes a trench structure that surrounds each of two semiconductor regions at different electrical potentials. Specifically, a first semiconductor region forms a ground-potential-based circuit, and a high voltage junction terminating structure around a second semiconductor region forms a floating-potential-based circuit. A trench structure is formed after digging a trench by implanting a high concentration p+ region on a trench wall, or alternatively, by filling the trench with a p+ doped polysilicon or with a dielectric.
Claims16
A semiconductor device, comprising:
- a semiconductor substrate of a first conductivity type;
- a semiconductor region of a second conductivity type on the substrate and having a first region and a second region;
- a trench structure formed on a surface of the semiconductor region extending into the substrate, the trench structure dividing the semiconductor region into the first region and the second region;
- a first conductivity type MOS comprising a drain region of the first conductivity type and a source region of the first conductivity type formed in at least one of the first region and the second region;
- and
- a second conductivity type MOS comprising a drain region of the second conductivity type and a source region of the second conductivity type, the drain region and the source region being formed in a first conductivity type region formed in the at least one of the first region and the second region.
A semiconductor device, comprising:
- a semiconductor substrate of a first conductivity type;
- a first semiconductor region of a second conductivity type formed in a surface region of the substrate;
- a second semiconductor region of the second conductivity type formed in another surface region of the substrate;
- a trench structure formed on the substrate between the first semiconductor region and the second semiconductor region at a depth deeper than the first semiconductor region and the second semiconductor region;
- a first conductivity type MOS comprising a drain region of the first conductivity type and a source region of the first conductivity type formed in at least one of the first semiconductor region and the second semiconductor region;
- and
- a second conductivity type MOS comprising a drain region of the second conductivity type and a source region of the second conductivity type, the drain region and the source region being formed in a first conductivity type region formed in the at least one of the first semiconductor region and the second semiconductor region.
Dependencies are inferred from the claim text.