Flash EEPROM with function of single bit erasing by an application of negative control gate selection

A method of forming a multi-bit flash cell comprising the steps of:

• providing a substrate;
• forming a first dielectric layer over said substrate;
• forming a first polysilicon layer over said first dielectric layer;
• defining a plurality of floating gate regions and etching openings over said first dielectric layer;
• forming a plurality of floating gates comprising said first polysilicon layer, wherein said plurality of floating gates are spaced apart by said plurality of openings over said first dielectric layer;
• forming a second dielectric layer over said plurality of floating gates, including said plurality of openings;
• forming a second polysilicon layer over said second dielectric layer;
• forming a third dielectric layer over said second polysilicon layer;
• forming a plurality of control gates comprising said third dielectric layer over said second polysilicon layer over said second dielectric layer over said plurality of floating gates;
• forming a fourth dielectric layer over the inside walls of said plurality of openings;
• forming a third polysilicon layer over first of said plurality of openings to form a first bit line over said substrate, and over last of said plurality of openings to form a second bit line over said substrate;
• forming a fifth dielectric layer over said first bit line and over said second bit line;
• and
• forming a fourth polysilicon layer over said fifth dielectric layer, including over said plurality of openings, to form a word line contacting select gates on substrate.

A programming method comprising the steps of:

• providing a multi-bit split-gate (MSG) flash cell having a pair of source/drain (S/D) bit lines (BL1, BL2), N′=(1+N) stacked gates comprising floating gates (FGs) and control gates (CGs) and N select gates (SGs) connected to a word line, where N equals any integer;
• exchanging the function of said control gates to that of transfer gates (TGs),
• exchanging the function of said select gates to include an erase function;
• performing a program (write) operation, bit by bit, wherein a write bit is selected by said word line, said bit lines and said control gate;
• performing an erase operation, wherein the erased bits are selected by said word line and said control gate, wherein a single bit or a page of bits can be erased;
• and
• performing a read operation, bit by bit, wherein a read bit is selected by said word line, said bit lines and said control gate.