Back to results
US 6,635,916 B2Granted
On-chip capacitor
AssigneeTexas Instruments Incorporated
InventorThomas J. Aton
Life of this patent
Estimating the term…
Abstract
An on-chip analog capacitor. Metal interconnect structures are used to form the capacitor, and the interdigitated fingers of like polarity within the interconnect structure are connected above and below to one another by metal vias to form a wall of metal which increases total capacitance by taking advantage of the via sidewall capacitance.
Claims13
An on-chip capacitor, comprising:
- first and second metal line patterns each in first and second levels;
- wherein said first pattern of said first level is connected to said first pattern of said second level by conducting vias;
- wherein said second pattern of said first level is connected to said second pattern of said second level by conducting vias;
- wherein said first pattern and said second pattern form contacts for said capacitor;
- and
- wherein said vias extend over greater than half the length of said first and said second metal line patterns where said patterns face each other.
3 more elements
An integrated circuit structure, comprising:
- a first layer having a first metallization pattern comprising at least two metal lines;
- a second layer having a second metallization pattern comprising at least two metal lines;
- wherein said first and second metallization patterns are connected by conducting vias to form a capacitance;
- and
- wherein said first and second metallization patterns are separated by a material of a first dielectric constant, and said vias are separated by a material of a second dielectric constant, said second dielectric constant being greater than said first dielectric constant.
2 more elements
An on-chip capacitor, comprising:
- a first stack of metal lines;
- a second stack of metal lines laterally separated from said first stack by a first dielectric material;
- wherein two or more of said metal lines of said first stack are vertically connected by conducting vias
- wherein two or more of said second stack are vertically connected by conducting vias;
- wherein said first stack and said second stack provide two terminals of a capacitor;
- and
- wherein said vias are laterally separated by a second dielectric material, and said dielectric constant of said second dielectric material is greater than the dielectric constant of said first dielectric material.
4 more elements
An on-chip capacitor, comprising:
- first and second interdigitated metal patterns providing lateral capacitance therebetween;
- elongated vias which provide lateral capacitance therebetween, and which are parallel to one another and electrically connected to each of said first and second patterns;
- wherein said first and second metal patterns, in combination with said elongated vias, define a capacitor.
Dependencies are inferred from the claim text.