Method of fabricating flash memory

A method of fabricating a flash memory, comprising:

• providing a substrate and an isolation region formed thereon to define an active region;
• forming a pad layer on the active region of the substrate;
• forming a mask layer over the substrate;
• patterning the mask layer and forming an opening therein;
• removing the pad layer exposed by the opening;
• forming a tunneling dielectric layer on the bottom of the opening;
• forming a first conducting layer over the substrate;
• removing a part of the first conducting layer by an anisotropic etching process to form a first conducting spacer on the sidewall of the opening, wherein the top of the first conducting spacer is lower than the surface of the mask layer;
• patterning the first conducting spacer to form a floating gate;
• forming a source region in the substrate exposed by the opening using the floating gate serving as a mask;
• forming an inter-gate dielectric layer in the opening;
• forming a second conducting layer over the substrate;
• removing the second conducting layer beside the opening to form a control gate;
• removing the mask layer;
• forming a gate dielectric layer on the substrate and forming spacers on the side wall of the floating gate and the control gate;
• forming a third conducting layer over the substrate;
• removing the third conducting layer by an anisotropic etching process to form a select gate on the sidewall of the spacers;
• and
• forming a drain region in the substrate on one side of the select gate.