Disposable spacer technology for reduced cost CMOS processing
AssigneeTexas Instruments Incorporated
InventorsDouglas T. Grider, Terence Breedijk
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Abstract
A method of fabricating a CMOS transistor using a silicon germanium disposable spacer (114) for the source/drain implant. After gate etch, silicon germanium disposable spacers (114) are formed. A NMOS resist pattern (116) is formed exposing the NMOS regions (120) and the n-type source/drain implant is performed. The disposable spacers (114) in the NMOS regions are removed and, with the NMOS resist mask (116) still in place, the LDD/MDD implant is performed. The process may then be repeated for the PMOS regions (122).
Claims14
A method for fabricating an integrated circuit, comprising the steps of:
- forming a plurally of gate electrodes over a semiconductor body;
- forming an etch stopping layer over said gate electrodes and said semiconductor body;
- forming disposable spacers comprising germanium separated from edges of said gate electrodes by said etch stopping layer;
- forming a first mask layer over said semiconductor body exposing a first region of said semiconductor body and covering a second region of said semiconductor body;
- implanting first source/drain regions in said first region using said first mask layer and at least one of said disposable spacers as an implant mask;
- removing said at least one of said disposable spacers;
- implanting first drain extension regions in said semiconductor body using said first mask layer as an implant mask after removing said at least one of said disposable spacers;
- and
- removing said first mask layer.
A method for fabricating an integrated circuit, comprising the steps of:
- forming a plural of gate electrodes over a semiconductor body;
- forming an etch stopping layer over said gate electrodes and said semiconductor body;
- forming disposable spacers comprising silicon-germanium separated from edges of said gate electrodes by said etch stopping layer;
- forming a first mask layer over said semiconductor body exposing a first region of said semiconductor body and covering a second region of said semiconductor body;
- using said first mask layer and at least one of said disposable spacers as a mask for implanting source/drain regions of a first conductivity type in said first region;
- removing said at least one of said disposable spacers;
- using said first mask layer as a mask for implanting drain extension regions in said semiconductor body after removing said at least one of said disposable spacers;
- removing said fist mask layer;
- forming a second mask layer over said semiconductor body exposing said second region of said semiconductor body and covering said first region of said semiconductor body;
- using said second mask layer and the remaining disposable spacers as a mask for implanting source/drain regions of a second conductivity type in said second region;
- removing the remaining disposable spacers;
- using said second mask layer as a mask for implanting drain extension regions of said second conductivity type in said semiconductor body after removing said remaining disposable spacers;
- and
- removing said second mask layer.
Dependencies are inferred from the claim text.