Packaged integrated circuit and method therefor
AssigneeMotorola, Inc.
InventorNhat D. Vo
Life of this patent
Estimating the term…
Abstract
To mitigate mold encapsulant bleeding and solder mask cracking in plastic semiconductor packages, a damming structure constructed from metal traces is formed in-line with the encapsulant perimeter. In one embodiment, each damming trace is connected to only one electrical trace, which includes a bonding connection, a signal portion and a plating portion. The damming traces can consist of one trace that is wider than any of the signal traces or multiple rows of traces, for example. The result is a reduction in mold encapsulant bleeding and, thus, an eradication of the processes performed to clean the bleeding.
Claims25
A packaged integrated circuit comprising:
- a substrate having a top surface and an edge;
- an integrated circuit die mounted on the substrate;
- an encapsulant over the top surface of the substrate, wherein the encapsulant has a perimeter, wherein a first portion of the perimeter is a first distance away from the edge of the substrate;
- a first barrier trace on the top surface, closest to the first portion of the perimeter of the encapsulant, and substantially parallel to the first portion of the perimeter of the encapsulant, wherein a portion of the first barrier trace is a second distance away from the edge of the substrate and the second distance is less than or equal to the first distance;
- a first bond connection on the top surface and inside the perimeter;
- a second bond connection on the top surface and inside the perimeter;
- a first electrical trace on the substrate and electrically connected to the first bond connection;
- and
- a second electrical trace adjacent to the first electrical trace and electrically connected to the second bond, wherein a portion of the first barrier trace is between the first and second electrical traces.
A packaged integrated circuit, comprising:
- a substrate having a plurality of bond connections, a plurality of vias, and an edge;
- an integrated circuit die mounted on the substrate and bonded to the plurality of bond connections;
- a plurality of signal traces running from the plurality of bond connections to the plurality of vias;
- an encapsulant over the substrate surrounding the bond connections, over the integrated circuit, and having an encapsulant perimeter;
- and
- a first plurality of barrier traces no farther from the edge of the substrate than the perimeter of the encapsulant and between adjacent pairs of signal traces, and wherein a portion of the first plurality is substantially parallel to a closest portion of the encapsulant perimeter.
Dependencies are inferred from the claim text.