System and method for introducing multiple component-type factors into an integrated circuit yield prediction
AssigneeAgere Systems Inc.
InventorCharles M. Drum
Life of this patent
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Abstract
A system for, and method of, introducing multiple component-type factors into a yield prediction regarding a wafer. In one embodiment, the system includes: (1) a first routine that accepts a first factor representing a probability of a first component-type area of an integrated circuit on the wafer being functional and (2) a second routine, associated with the first routine, that accepts a second factor representing a probability of a second component-type area of the integrated circuit being functional.
Claims23
A system for introducing multiple component-type factors into a yield prediction regarding a wafer, comprising:
- a first routine that accepts a first factor representing a probability of a first component-type area of an integrated circuit on said wafer being functional, said first component-type area including circuitry of a first component-type;
- and
- a second routine, associated with said first routine, that accepts a second factor representing a probability of a second component-type area of said integrated circuit being functional, said second component-type area including circuitry of a second component-type different from said first component-type.
A method of introducing multiple component-type factors into a yield prediction regarding a wafer, comprising:
- accepting a first factor representing a probability of a first component-type area of an integrated circuit on said wafer being functional, said first component-type area including circuitry of a first component-type;
- and
- accepting a second factor representing a probability of a second component-type area of said integrated circuit being functional, said second component-type area including circuitry of a second component-type different from said first component-type.
A system for performing a yield prediction with respect to a wafer containing integrated circuits having multiple component-types, comprising:
- a first routine that accepts a first factor representing a probability of a first component-type area of an integrated circuit on said wafer being functional, said first component-type area including circuitry of a first component-type;
- a second routine that accepts a second factor representing a probability of a second component-type area of said integrated circuit being functional, said second component-type area including circuitry of a second component-type different from said first component-type;
- and
- a third routine, associated with said first and second routines, that employs said first and second factors in a total yield function to perform said yield analysis.
Dependencies are inferred from the claim text.