Method and apparatus for forming a pattern on an integrated circuit using differing exposure characteristics

A method for forming a pattern on an integrated circuit, the method comprising:

• applying a first light to a first portion of the integrated circuit, wherein the first light has a first phase and a first attribute of light;
• applying a second light to a second portion of the integrated circuit, wherein the second light has a second phase and a second attribute of light;
• applying a third light to a third portion of the integrated circuit adjacent to the first and second portions, wherein the third light has the second phase and the first attribute of light;
• applying a fourth light to a fourth portion of the integrated circuit adjacent to the second portion, wherein the fourth light has the first phase and the second attribute of light;
• and
• applying a fifth light to a fifth portion of the integrated circuit adjacent to the fourth portion and the first portion, wherein the fourth light has the second phase and the second attribute of light.

A method for making a pattern on an integrated circuit, the method comprising:

• applying a first light having an attribute and a phase to the integrated circuit through a first region;
• applying a second light having an attribute and a phase to the integrated circuit through a second region to form an unexposed region at a first boundary, wherein:
• the phase of the second light is approximately one hundred and eighty degrees out of phase with the of the first light;
• the attribute of the second light is the same as the attribute of the first light;
• and
• the first region and the second region are on opposing sides of the first boundary;
• applying a third light having an attribute and a phase to the integrated circuit through a third region to form an exposed region at a second boundary, wherein:
• the second boundary is an interface between the second region and third region;
• and
• the attribute of the third light is different from the attribute of the second light;
• applying a fourth light to the integrated circuit through a fourth region to form an unexposed region at a third boundary, wherein:
• the attribute of the fourth light is the same as the attribute of the third light;
• the phase of the fourth light is approximately one hundred and eighty degrees out of phase with the phase of the third light;
• the fourth region and the third region are on opposing sides of the third boundary;
• and
• applying a fifth light to the integrated circuit through a fifth region to form an unexposed region at a fourth boundary and an exposed portion at a fifth boundary:
• wherein:
• the attribute of the fifth light is the same as the attribute of the fourth light;
• the phase of the fourth light is approximately one hundred and eighty degrees out of phase with the phase of the fourth light;
• the fifth and fourth regions are on opposing sides of the fourth boundary;
• and
• the fifth and first regions are on opposing sides of the fifth boundary.